[Intel-gfx] ✓ Fi.CI.BAT: success for Add uAPI to query microcontroller fw version

2023-10-03 Thread Patchwork
== Series Details == Series: Add uAPI to query microcontroller fw version URL : https://patchwork.freedesktop.org/series/124592/ State : success == Summary == CI Bug Log - changes from CI_DRM_13708 -> Patchwork_124592v1 Summary ---

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Add uAPI to query microcontroller fw version

2023-10-03 Thread Patchwork
== Series Details == Series: Add uAPI to query microcontroller fw version URL : https://patchwork.freedesktop.org/series/124592/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add uAPI to query microcontroller fw version

2023-10-03 Thread Patchwork
== Series Details == Series: Add uAPI to query microcontroller fw version URL : https://patchwork.freedesktop.org/series/124592/ State : warning == Summary == Error: dim checkpatch failed 5205a07029c0 Add uAPI to query microcontroller fw version -:10: WARNING:COMMIT_LOG_LONG_LINE: Prefer a

Re: [Intel-gfx] [PATCH] dma-buf: Deny copy-on-writes mmaps

2023-10-03 Thread kernel test robot
Hi Andi, kernel test robot noticed the following build errors: [auto build test ERROR on drm-misc/drm-misc-next] [also build test ERROR on linus/master v6.6-rc4 next-20231003] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use

[Intel-gfx] [Patch v2] Add uAPI to query microcontroller fw version

2023-10-03 Thread Vivaik Balasubrawmanian
Due to a bug in GuC firmware, Mesa can't enable by default the usage of async compute engines feature in DG2 and newer. A new GuC firmware fixed the issue but until now there was no way for Mesa to know if KMD was running with the fixed GuC version or not, so this uAPI is required. More

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/gt: Increase MCR lock timeout (rev2)

2023-10-03 Thread Patchwork
== Series Details == Series: drm/i915/gt: Increase MCR lock timeout (rev2) URL : https://patchwork.freedesktop.org/series/124576/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13707_full -> Patchwork_124576v2_full Summary

[Intel-gfx] ✗ Fi.CI.IGT: failure for dma-buf: Deny copy-on-writes mmaps

2023-10-03 Thread Patchwork
== Series Details == Series: dma-buf: Deny copy-on-writes mmaps URL : https://patchwork.freedesktop.org/series/124580/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13707_full -> Patchwork_124580v1_full Summary ---

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: Increase MCR lock timeout (rev2)

2023-10-03 Thread Patchwork
== Series Details == Series: drm/i915/gt: Increase MCR lock timeout (rev2) URL : https://patchwork.freedesktop.org/series/124576/ State : success == Summary == CI Bug Log - changes from CI_DRM_13707 -> Patchwork_124576v2 Summary ---

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Start cleaning up the DPLL ID mess (rev3)

2023-10-03 Thread Patchwork
== Series Details == Series: drm/i915: Start cleaning up the DPLL ID mess (rev3) URL : https://patchwork.freedesktop.org/series/108827/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13706_full -> Patchwork_108827v3_full

[Intel-gfx] ✓ Fi.CI.BAT: success for dma-buf: Deny copy-on-writes mmaps

2023-10-03 Thread Patchwork
== Series Details == Series: dma-buf: Deny copy-on-writes mmaps URL : https://patchwork.freedesktop.org/series/124580/ State : success == Summary == CI Bug Log - changes from CI_DRM_13707 -> Patchwork_124580v1 Summary ---

[Intel-gfx] [PATCH] dma-buf: Deny copy-on-writes mmaps

2023-10-03 Thread Andi Shyti
From: Chris Wilson Enforce that an mmap of a dmabuf is always using MAP_SHARED so that all access (both read and writes) using the device memory and not a local copy-on-write page in system memory. Signed-off-by: Chris Wilson Signed-off-by: Andi Shyti --- drivers/dma-buf/dma-buf.c | 15

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/gt: Increase MCR lock timeout

2023-10-03 Thread Patchwork
== Series Details == Series: drm/i915/gt: Increase MCR lock timeout URL : https://patchwork.freedesktop.org/series/124576/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13706 -> Patchwork_124576v1 Summary ---

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v4,1/3] drm/i915: Add GuC TLB Invalidation pci tags

2023-10-03 Thread Patchwork
== Series Details == Series: series starting with [v4,1/3] drm/i915: Add GuC TLB Invalidation pci tags URL : https://patchwork.freedesktop.org/series/124575/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13706 -> Patchwork_124575v1

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [v4,1/3] drm/i915: Add GuC TLB Invalidation pci tags

2023-10-03 Thread Patchwork
== Series Details == Series: series starting with [v4,1/3] drm/i915: Add GuC TLB Invalidation pci tags URL : https://patchwork.freedesktop.org/series/124575/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v4,1/3] drm/i915: Add GuC TLB Invalidation pci tags

2023-10-03 Thread Patchwork
== Series Details == Series: series starting with [v4,1/3] drm/i915: Add GuC TLB Invalidation pci tags URL : https://patchwork.freedesktop.org/series/124575/ State : warning == Summary == Error: dim checkpatch failed 2112f658680f drm/i915: Add GuC TLB Invalidation pci tags febaffe1c6c6

Re: [Intel-gfx] [PATCH v3 1/4] drm/i915: Define and use GuC and CTB TLB invalidation routines

2023-10-03 Thread Andi Shyti
Hi John, > > > > - mmio_invalidate_full(gt); > > > > + if (INTEL_GUC_SUPPORTS_TLB_INVALIDATION(guc)) { > > > > + if (intel_guc_is_ready(guc)) > > > > + intel_guc_invalidate_tlb_full(guc); > > > > + }

[Intel-gfx] [PATCH] drm/i915/gt: Increase MCR lock timeout

2023-10-03 Thread Jonathan Cavitt
Increase the timeout MCR waits for the steering semaphore in intel_gt_mcr_lock by a factor of 10. Signed-off-by: Jonathan Cavitt --- drivers/gpu/drm/i915/gt/intel_gt_mcr.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gt/intel_gt_mcr.c

[Intel-gfx] [PATCH v4 3/3] drm/i915: No TLB invalidation on wedged or suspended GT

2023-10-03 Thread Jonathan Cavitt
In case of GT is suspended or wedged, don't allow submission of new TLB invalidation request and cancel all pending requests. The TLB entries will be invalidated either during GuC reload or on system resume. Signed-off-by: Fei Yang Signed-off-by: Jonathan Cavitt CC: John Harrison ---

[Intel-gfx] [PATCH v4 2/3] drm/i915: Define and use GuC and CTB TLB invalidation routines

2023-10-03 Thread Jonathan Cavitt
From: Prathap Kumar Valsan The GuC firmware had defined the interface for Translation Look-Aside Buffer (TLB) invalidation. We should use this interface when invalidating the engine and GuC TLBs. Add additional functionality to intel_gt_invalidate_tlb, invalidating the GuC TLBs and falling back

[Intel-gfx] [PATCH v4 1/3] drm/i915: Add GuC TLB Invalidation pci tags

2023-10-03 Thread Jonathan Cavitt
Add device info tags for if GuC TLB Invalidation is enabled. Since GuC based TLB invalidation is only strictly necessary for MTL presently, only enable GuC based TLB invalidations for MTL. Signed-off-by: Jonathan Cavitt --- drivers/gpu/drm/i915/i915_drv.h | 1 +

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Start cleaning up the DPLL ID mess (rev3)

2023-10-03 Thread Patchwork
== Series Details == Series: drm/i915: Start cleaning up the DPLL ID mess (rev3) URL : https://patchwork.freedesktop.org/series/108827/ State : success == Summary == CI Bug Log - changes from CI_DRM_13706 -> Patchwork_108827v3 Summary

Re: [Intel-gfx] [PATCH 1/3] drm/i915/guc: Support new and improved engine busyness

2023-10-03 Thread Umesh Nerlige Ramappa
On Fri, Sep 22, 2023 at 03:25:08PM -0700, john.c.harri...@intel.com wrote: From: John Harrison The GuC has been extended to support a much more friendly engine busyness interface. So partition the old interface into a 'busy_v1' space and add 'busy_v2' support alongside. And if v2 is available,

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Start cleaning up the DPLL ID mess (rev3)

2023-10-03 Thread Patchwork
== Series Details == Series: drm/i915: Start cleaning up the DPLL ID mess (rev3) URL : https://patchwork.freedesktop.org/series/108827/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Start cleaning up the DPLL ID mess (rev3)

2023-10-03 Thread Patchwork
== Series Details == Series: drm/i915: Start cleaning up the DPLL ID mess (rev3) URL : https://patchwork.freedesktop.org/series/108827/ State : warning == Summary == Error: dim checkpatch failed af48f78e0453 drm/i915: Stop requiring PLL index == PLL ID -:184: CHECK:SPACING: No space is

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/6] drm/i915/fbc: Remove ancient 16k plane stride limit

2023-10-03 Thread Patchwork
== Series Details == Series: series starting with [v2,1/6] drm/i915/fbc: Remove ancient 16k plane stride limit URL : https://patchwork.freedesktop.org/series/124568/ State : success == Summary == CI Bug Log - changes from CI_DRM_13706 -> Patchwork_124568v1

Re: [Intel-gfx] [PATCH v3 1/4] drm/i915: Define and use GuC and CTB TLB invalidation routines

2023-10-03 Thread John Harrison
On 10/3/2023 09:41, Andi Shyti wrote: [...] - mmio_invalidate_full(gt); + if (INTEL_GUC_SUPPORTS_TLB_INVALIDATION(guc)) { + if (intel_guc_is_ready(guc)) + intel_guc_invalidate_tlb_full(guc); + } else

Re: [Intel-gfx] [PATCH v3 1/4] drm/i915: Define and use GuC and CTB TLB invalidation routines

2023-10-03 Thread John Harrison
On 10/3/2023 03:28, Tvrtko Ursulin wrote: On 02/10/2023 18:24, Jonathan Cavitt wrote: From: Prathap Kumar Valsan The GuC firmware had defined the interface for Translation Look-Aside Buffer (TLB) invalidation.  We should use this interface when invalidating the engine and GuC TLBs. Add

[Intel-gfx] [PATCH v3 4/4] drm/i915: s/dev_priv/i915/ in the shared_dpll code

2023-10-03 Thread Ville Syrjala
From: Ville Syrjälä Do a s/dev_priv/i915/ pass over the shared_dpll code to get the variable names into sync with modern standards. v2: Rebase Reviewed-by: Jani Nikula #v1 Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 872 +-

[Intel-gfx] [PATCH v3 3/4] drm/i915: Introduce for_each_shared_dpll()

2023-10-03 Thread Ville Syrjala
From: Ville Syrjälä No one really cares how we store the shared_dplls. Currently it happens to be an array, but we could change that to a more flexible scheme at some point. Hide the implementation details behind an iterator macro. The slight downside is the pll variable moving out of the loop

[Intel-gfx] [PATCH v3 0/4] drm/i915: Start cleaning up the DPLL ID mess

2023-10-03 Thread Ville Syrjala
From: Ville Syrjälä Start to clean up the mess around DPLL IDs a bit by removing the nasty assumption that the index of the DPLL in the arrays matches its ID. Fortunately we did have a WARN i nthere to cathc mistakes, but better to not has such silly assumptions i nthe first place. There's

[Intel-gfx] [PATCH v3 2/4] drm/i915: Decouple I915_NUM_PLLS from PLL IDs

2023-10-03 Thread Ville Syrjala
From: Ville Syrjälä Stop assuming the size of PLL ID based bitmask is restricted to I915_NUM_PLLS bits. This is the last thing coupling the two things together and thus artificially limiting PLL IDs. We could just pass any arbitrary (large enough) size to for_each_set_bit() and be done with it,

[Intel-gfx] [PATCH v3 1/4] drm/i915: Stop requiring PLL index == PLL ID

2023-10-03 Thread Ville Syrjala
From: Ville Syrjälä There's no good reason to keep around this PLL index == PLL ID footgun. Get rid of it. Both i915->shared_dplls[] and state->shared_dpll[] are indexed by the same thing now, which is just the index we get at initialization from dpll_mgr->dpll_info[]. The rest is all about PLL

Re: [Intel-gfx] [PATCH 0/4] drm/i915: move display info related stuff under display/

2023-10-03 Thread Ville Syrjälä
On Tue, Oct 03, 2023 at 03:42:06PM +0300, Jani Nikula wrote: > Continue separation of display code from the rest. > > Jani Nikula (4): > drm/i915: convert INTEL_DISPLAY_ENABLED() into a function > drm/i915: move display info related macros to display > drm/i915: separate display runtime

[Intel-gfx] [PATCH v2 6/6] drm/i915/fbc: Remove pointless "stride is multiple of 64 bytes" check

2023-10-03 Thread Ville Syrjala
From: Ville Syrjälä Plane stride is always a multiple of 64 bytes. Remove the pointless check that really doesn't have anything to do with FBC. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_fbc.c | 7 --- 1 file changed, 7 deletions(-) diff --git

[Intel-gfx] [PATCH v2 2/6] drm/i915/fbc: Split plane stride checks per-platform

2023-10-03 Thread Ville Syrjala
From: Ville Syrjälä Carve up stride_is_valid() into per-platform variants to make it easier to see what limits are actually being imposed. TODO: maybe go for vfuncs later Reviewed-by: Juha-Pekka Heikkila Reviewed-by: Vinod Govindapillai Signed-off-by: Ville Syrjälä ---

[Intel-gfx] [PATCH v2 3/6] drm/i915/fbc: Split plane tiling checks per-platform

2023-10-03 Thread Ville Syrjala
From: Ville Syrjälä Carve up tiling_is_valid() into per-platform variants to make it easier to see what limits are actually being imposed. TODO: maybe go for vfuncs later Reviewed-by: Juha-Pekka Heikkila Reviewed-by: Vinod Govindapillai Signed-off-by: Ville Syrjälä ---

[Intel-gfx] [PATCH v2 5/6] drm/i915/fbc: Split plane pixel format checks per-platform

2023-10-03 Thread Ville Syrjala
From: Ville Syrjälä Carve up pixel_format_is_valid() into per-platform variants to make it easier to see what limits are actually being imposed. Note that the XRGB1555 can be dropped from the g4x+ variant since the plane no longer supports that format anyway. TODO: maybe go for vfuncs later

[Intel-gfx] [PATCH v2 4/6] drm/i915/fbc: Split plane rotation checks per-platform

2023-10-03 Thread Ville Syrjala
From: Ville Syrjälä Carve up rotation_is_valid() into per-platform variants to make it easier to see what limits are actually being imposed. TODO: maybe go for vfuncs later Reviewed-by: Juha-Pekka Heikkila Reviewed-by: Vinod Govindapillai Signed-off-by: Ville Syrjälä ---

[Intel-gfx] [PATCH v2 1/6] drm/i915/fbc: Remove ancient 16k plane stride limit

2023-10-03 Thread Ville Syrjala
From: Ville Syrjälä The 16k max plane stride limit seems to be originally from i965gm, and no explicit limit has been specified since (g4x+). So let's assume the max plane stride itself is a suitable limit also for the more recent FBC hardware. In fact even for i965gm the max X-tiled stride is

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: move display info related stuff under display/

2023-10-03 Thread Patchwork
== Series Details == Series: drm/i915: move display info related stuff under display/ URL : https://patchwork.freedesktop.org/series/124558/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13705_full -> Patchwork_124558v1_full

Re: [Intel-gfx] [PATCH v3 3/4] drm/i915: Perform TLB invalidation on all GTs during suspend/resume

2023-10-03 Thread John Harrison
On 10/3/2023 08:59, Andi Shyti wrote: Hi Jani, Consider multi-gt support when cancelling all tlb invalidations on suspend, and when submitting tlb invalidations on resume. Suggested-by: Tvrtko Ursulin Signed-off-by: Fei Yang Signed-off-by: Jonathan Cavitt CC: John Harrison I guess I'm

Re: [Intel-gfx] [PATCH] drm/i915: Invalidate the TLBs on each GT

2023-10-03 Thread Andi Shyti
Hi Jonathan and Chris, On Mon, Oct 02, 2023 at 07:07:42AM -0700, Jonathan Cavitt wrote: > From: Chris Wilson > > With multi-GT devices, the object may have been bound on each GT and so > we need to invalidate the TLBs across all GT before releasing the pages > back to the system. > > Fixes:

Re: [Intel-gfx] [PATCH v3 1/4] drm/i915: Define and use GuC and CTB TLB invalidation routines

2023-10-03 Thread Andi Shyti
Hi, [...] > > +static void guc_ggtt_invalidate(struct i915_ggtt *ggtt) > > +{ > > + struct drm_i915_private *i915 = ggtt->vm.i915; > > + struct intel_gt *gt; > > + > > + if (!IS_GEN9_LP(i915) && GRAPHICS_VER(i915) < 11) > > + gen8_ggtt_invalidate(ggtt); > > + > > +

Re: [Intel-gfx] [PATCH v3 3/4] drm/i915: Perform TLB invalidation on all GTs during suspend/resume

2023-10-03 Thread Andi Shyti
Hi Jani, > > Consider multi-gt support when cancelling all tlb invalidations on > > suspend, and when submitting tlb invalidations on resume. > > > > Suggested-by: Tvrtko Ursulin > > Signed-off-by: Fei Yang > > Signed-off-by: Jonathan Cavitt > > CC: John Harrison > > I guess I'm wondering

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Invalidate the TLBs on each GT (rev2)

2023-10-03 Thread Patchwork
== Series Details == Series: drm/i915: Invalidate the TLBs on each GT (rev2) URL : https://patchwork.freedesktop.org/series/124528/ State : success == Summary == CI Bug Log - changes from CI_DRM_13704_full -> Patchwork_124528v2_full

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: move display info related stuff under display/

2023-10-03 Thread Patchwork
== Series Details == Series: drm/i915: move display info related stuff under display/ URL : https://patchwork.freedesktop.org/series/124558/ State : success == Summary == CI Bug Log - changes from CI_DRM_13705 -> Patchwork_124558v1 Summary

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: move display info related stuff under display/

2023-10-03 Thread Patchwork
== Series Details == Series: drm/i915: move display info related stuff under display/ URL : https://patchwork.freedesktop.org/series/124558/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: move display info related stuff under display/

2023-10-03 Thread Patchwork
== Series Details == Series: drm/i915: move display info related stuff under display/ URL : https://patchwork.freedesktop.org/series/124558/ State : warning == Summary == Error: dim checkpatch failed 770f44b90d80 drm/i915: convert INTEL_DISPLAY_ENABLED() into a function 63056bd22445 drm/i915:

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: nuke i915->gt0 (rev2)

2023-10-03 Thread Patchwork
== Series Details == Series: drm/i915: nuke i915->gt0 (rev2) URL : https://patchwork.freedesktop.org/series/124508/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13703_full -> Patchwork_124508v2_full Summary ---

Re: [Intel-gfx] [Intel-xe] [PATCH v5 0/2] fbc on any planes

2023-10-03 Thread Ville Syrjälä
On Fri, Sep 22, 2023 at 04:30:01PM +0300, Vinod Govindapillai wrote: > FBC can be supported in first three planes in lnl > > Vinod Govindapillai (2): > drm/i915/lnl: possibility to enable FBC on first three planes > drm/i915/lnl: update the supported plane formats with FBC Pushed to

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Invalidate the TLBs on each GT (rev2)

2023-10-03 Thread Patchwork
== Series Details == Series: drm/i915: Invalidate the TLBs on each GT (rev2) URL : https://patchwork.freedesktop.org/series/124528/ State : success == Summary == CI Bug Log - changes from CI_DRM_13704 -> Patchwork_124528v2 Summary ---

Re: [Intel-gfx] [PATCH v2 01/15] cdrom: Remove now superfluous sentinel element from ctl_table array

2023-10-03 Thread Phillip Potter
> From: Joel Granados > > This commit comes at the tail end of a greater effort to remove the > empty elements at the end of the ctl_table arrays (sentinels) which > will reduce the overall build time size of the kernel and run time > memory bloat by ~64 bytes per sentinel (further information

Re: [Intel-gfx] [PATCH v2 11/15] sgi-xp: Remove the now superfluous sentinel element from ctl_table array

2023-10-03 Thread Steve Wahl
On Mon, Oct 02, 2023 at 10:55:28AM +0200, Joel Granados via B4 Relay wrote: > From: Joel Granados > > This commit comes at the tail end of a greater effort to remove the > empty elements at the end of the ctl_table arrays (sentinels) which > will reduce the overall build time size of the kernel

Re: [Intel-gfx] [PATCH v2 10/15] vrf: Remove the now superfluous sentinel element from ctl_table array

2023-10-03 Thread David Ahern
On 10/2/23 2:55 AM, Joel Granados via B4 Relay wrote: > From: Joel Granados > > This commit comes at the tail end of a greater effort to remove the > empty elements at the end of the ctl_table arrays (sentinels) which > will reduce the overall build time size of the kernel and run time > memory

[Intel-gfx] [PATCH 4/4] drm/i915: separate subplatform init and runtime feature init

2023-10-03 Thread Jani Nikula
Adjusting ->port_mask does not belong in intel_device_info_subplatform_init(), but rather intel_display_device_info_runtime_init(). Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/display/intel_display_device.c | 7 +++ drivers/gpu/drm/i915/intel_device_info.c| 5 - 2

[Intel-gfx] [PATCH 3/4] drm/i915: separate display runtime info init

2023-10-03 Thread Jani Nikula
Move display related functionality from intel_device_info_runtime_init() to intel_display_device_info_runtime_init() and call the latter from the top level. Signed-off-by: Jani Nikula --- .../drm/i915/display/intel_display_device.c | 19 ++- drivers/gpu/drm/i915/i915_driver.c

[Intel-gfx] [PATCH 2/4] drm/i915: move display info related macros to display

2023-10-03 Thread Jani Nikula
Anything looking at display (runtime) info should be under display. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/display/intel_display_device.h | 9 + drivers/gpu/drm/i915/i915_drv.h | 8 2 files changed, 9 insertions(+), 8 deletions(-) diff --git

[Intel-gfx] [PATCH 1/4] drm/i915: convert INTEL_DISPLAY_ENABLED() into a function

2023-10-03 Thread Jani Nikula
There's no need for this to be a macro. Add some documentation too. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/display/intel_crt.c| 2 +- .../gpu/drm/i915/display/intel_display_device.c | 17 + .../gpu/drm/i915/display/intel_display_device.h | 1 +

[Intel-gfx] [PATCH 0/4] drm/i915: move display info related stuff under display/

2023-10-03 Thread Jani Nikula
Continue separation of display code from the rest. Jani Nikula (4): drm/i915: convert INTEL_DISPLAY_ENABLED() into a function drm/i915: move display info related macros to display drm/i915: separate display runtime info init drm/i915: separate subplatform init and runtime feature init

Re: [Intel-gfx] [PATCH v3 2/4] drm/i915: No TLB invalidation on wedged or suspended GT

2023-10-03 Thread Jani Nikula
On Mon, 02 Oct 2023, Jonathan Cavitt wrote: > From: Fei Yang > > In case of GT is suspended or wedged, don't allow submission of new TLB > invalidation request and cancel all pending requests. The TLB entries > will be invalidated either during GuC reload or on system resume. > > Signed-off-by:

Re: [Intel-gfx] [PATCH v3 3/4] drm/i915: Perform TLB invalidation on all GTs during suspend/resume

2023-10-03 Thread Jani Nikula
On Mon, 02 Oct 2023, Jonathan Cavitt wrote: > Consider multi-gt support when cancelling all tlb invalidations on > suspend, and when submitting tlb invalidations on resume. > > Suggested-by: Tvrtko Ursulin > Signed-off-by: Fei Yang > Signed-off-by: Jonathan Cavitt > CC: John Harrison I guess

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: nuke i915->gt0 (rev2)

2023-10-03 Thread Patchwork
== Series Details == Series: drm/i915: nuke i915->gt0 (rev2) URL : https://patchwork.freedesktop.org/series/124508/ State : success == Summary == CI Bug Log - changes from CI_DRM_13703 -> Patchwork_124508v2 Summary --- **SUCCESS**

Re: [Intel-gfx] [PATCH v3 1/4] drm/i915: Define and use GuC and CTB TLB invalidation routines

2023-10-03 Thread Tvrtko Ursulin
Some more comments.. On 02/10/2023 18:24, Jonathan Cavitt wrote: From: Prathap Kumar Valsan The GuC firmware had defined the interface for Translation Look-Aside Buffer (TLB) invalidation. We should use this interface when invalidating the engine and GuC TLBs. Add additional functionality

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: nuke i915->gt0 (rev2)

2023-10-03 Thread Patchwork
== Series Details == Series: drm/i915: nuke i915->gt0 (rev2) URL : https://patchwork.freedesktop.org/series/124508/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

Re: [Intel-gfx] [PATCH v3 2/4] drm/i915: No TLB invalidation on wedged or suspended GT

2023-10-03 Thread Tvrtko Ursulin
On 02/10/2023 18:24, Jonathan Cavitt wrote: From: Fei Yang In case of GT is suspended or wedged, don't allow submission of new TLB invalidation request and cancel all pending requests. The TLB entries will be invalidated either during GuC reload or on system resume. Signed-off-by: Fei Yang

Re: [Intel-gfx] [PATCH v3 1/4] drm/i915: Define and use GuC and CTB TLB invalidation routines

2023-10-03 Thread Tvrtko Ursulin
On 02/10/2023 18:24, Jonathan Cavitt wrote: From: Prathap Kumar Valsan The GuC firmware had defined the interface for Translation Look-Aside Buffer (TLB) invalidation. We should use this interface when invalidating the engine and GuC TLBs. Add additional functionality to

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Invalidate the TLBs on each GT

2023-10-03 Thread Andi Shyti
Hi, > Possible regressions > > • igt@kms_flip@flip-vs-suspend-interruptible@a-hdmi-a3: > □ shard-dg2: PASS -> INCOMPLETE I believe this is not caused by this patch. I'm going to push it. Andi

[Intel-gfx] [PATCH i-g-t 9/9] lib/kunit: Execute kunit test cases only when needed

2023-10-03 Thread Janusz Krzysztofik
IGT user interface allows to request execution of only those dynamic sub- subtests that match a user provided name pattern. If the user pattern doesn't match any names of test cases provided by a kunit test module used with the subtest to be run then no results from any dynamic sub-subtests will

[Intel-gfx] [PATCH i-g-t 6/9] tests/kms_selftest: Let subtest names match suite names

2023-10-03 Thread Janusz Krzysztofik
There is a rule specified in Kunit Test Style and Nomenclature guidelines [1] that states modules should be named after the test suite, followed by _test. Of course, that rule applies only to modules that provide one test suite per module. As long as that rule is obeyed by authors of Kunit test

[Intel-gfx] [PATCH i-g-t 7/9] lib/ktap: Drop workaround for missing top level KTAP headers

2023-10-03 Thread Janusz Krzysztofik
A workaround was implemented in IGT KTAP parser so it could accepted KTAP reports with missing top level KTAP version and test suite plan headers. Since kernel side commit c95e7c05c139 ("kunit: Report the count of test suites in a module"), included in the mainline kernel since v6.6-rc1, has fixed

[Intel-gfx] [PATCH i-g-t 8/9] lib/kunit: Fetch a list of test cases in advance

2023-10-03 Thread Janusz Krzysztofik
Recent improvements to the kernel kunit framework allow us to obtain a list of test cases provided by a kunit test module without actually running them. Use that feature to get a list of expected test cases before we enter a loop around igt_dynamic(). Once done, enter the igt_dynamic() section

[Intel-gfx] [PATCH i-g-t 5/9] lib/kunit: Omit suite name prefix if the same as subtest name

2023-10-03 Thread Janusz Krzysztofik
Kunit test modules usually contain one test suite, named after the module name with the trailing "_test" or "_kunit" suffix omitted. Since we follow the same convention when we derive subtest names from module names, there is a great chance that those two names match. Take this into account when

[Intel-gfx] [PATCH i-g-t 4/9] lib/kunit: Parse KTAP report from the main process thread

2023-10-03 Thread Janusz Krzysztofik
There was an attempt to parse KTAP reports in the background while a kunit test module is loading. However, since dynamic sub-subtests can be executed only from the main thread, that attempt was not quite successful, as IGT results from all executed kunit test cases were generated only after

[Intel-gfx] [PATCH i-g-t 3/9] lib/kunit: Fix misplaced igt_kunit() doc

2023-10-03 Thread Janusz Krzysztofik
When igt_kunit() was converted to a helper and wrapped with a new function promoted to take the name and role of the library API, related documentation was left unchanged and still placed in front the demoted function. Update that documentation and move it to where it now belongs. Signed-off-by:

[Intel-gfx] [PATCH i-g-t 2/9] lib/kunit: Be more verbose on errors

2023-10-03 Thread Janusz Krzysztofik
Use a more verbose variant of igt_fail() when failing a dynamic sub- subtest on kernel taint. Also, print a debug message on string duplication failure. Signed-off-by: Janusz Krzysztofik --- lib/igt_kmod.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/lib/igt_kmod.c

[Intel-gfx] [PATCH i-g-t 1/9] lib/kunit: Fix handling of potential errors from F_GETFL

2023-10-03 Thread Janusz Krzysztofik
Function fcntl(..., F_GETFL, ...) that returns file status flags may also return a negative error code. Handle that error instead of blindly using the returned value as flags. Signed-off-by: Janusz Krzysztofik --- lib/igt_kmod.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff

[Intel-gfx] [PATCH i-g-t 0/9] Kunit fixes and improvements

2023-10-03 Thread Janusz Krzysztofik
Janusz Krzysztofik (9): lib/kunit: Fix handling of potential errors from F_GETFL lib/kunit: Be more verbose on errors lib/kunit: Fix misplaced igt_kunit() doc lib/kunit: Parse KTAP report from the main process thread lib/kunit: Omit suite name prefix if the same as subtest name

Re: [Intel-gfx] [PATCH] drm/i915: Abstract display info away during probe

2023-10-03 Thread Jani Nikula
On Mon, 02 Oct 2023, Rodrigo Vivi wrote: > On Mon, Oct 02, 2023 at 07:58:30PM +0300, Jani Nikula wrote: >> On Mon, 02 Oct 2023, Rodrigo Vivi wrote: >> > On Mon, Oct 02, 2023 at 10:41:14AM +0300, Jani Nikula wrote: >> >> On Fri, 29 Sep 2023, Rodrigo Vivi wrote: >> >> > The goal is to have this

Re: [Intel-gfx] [PATCH v2 00/15] sysctl: Remove sentinel elements from drivers

2023-10-03 Thread Joel Granados
On Mon, Oct 02, 2023 at 12:27:18PM +, Christophe Leroy wrote: > > > Le 02/10/2023 à 10:55, Joel Granados via B4 Relay a écrit : > > From: Joel Granados > > <--- snip ---> > > - The "yesall" config saves 2432 bytes [4] > > - The "tiny" config saves 64 bytes [5] > > *

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Add wrapper for getiing display step (rev2)

2023-10-03 Thread Patchwork
== Series Details == Series: drm/i915: Add wrapper for getiing display step (rev2) URL : https://patchwork.freedesktop.org/series/124340/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13702 -> Patchwork_124340v2 Summary

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Add wrapper for getiing display step (rev2)

2023-10-03 Thread Patchwork
== Series Details == Series: drm/i915: Add wrapper for getiing display step (rev2) URL : https://patchwork.freedesktop.org/series/124340/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

Re: [Intel-gfx] [PATCH 3/3] drm/i915/gt: remove i915->gt0 in favour of i915->gt[0]

2023-10-03 Thread Andi Shyti
Hi Jani, On Mon, Oct 02, 2023 at 11:47:04AM +0300, Jani Nikula wrote: > Since gt0 == i915->gt[0], just drop the former. > > Signed-off-by: Jani Nikula Looks correct! Reviewed-by: Andi Shyti Thanks, Andi

Re: [Intel-gfx] [PATCH v2 2/2] drm/i915: Clarify type evolution of uabi_node/uabi_engines

2023-10-03 Thread Tvrtko Ursulin
On 29/09/2023 12:00, Tvrtko Ursulin wrote: On 28/09/2023 19:20, Mathias Krause wrote: Chaining user engines happens in multiple passes during driver initialization, mutating its type along the way. It starts off with a simple lock-less linked list (struct llist_node/head) populated by

[Intel-gfx] [PATCH] drm/i915: Add wrapper for getting display step

2023-10-03 Thread Chaitanya Kumar Borah
Add a wrapper around intel_step_name that takes in driver data as an argument. This wrapper will help maintain compatibility with the proposed xe driver. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Animesh Manna --- drivers/gpu/drm/i915/display/intel_dmc.c | 2 +-

Re: [Intel-gfx] [PATCH 2/3] drm/i915: allocate i915->gt0 dynamically

2023-10-03 Thread Andi Shyti
Hi Jani, On Mon, Oct 02, 2023 at 11:47:03AM +0300, Jani Nikula wrote: > Convert i915->gt0 to a pointer, and allocate it dynamically. > > Signed-off-by: Jani Nikula Reviewed-by: Andi Shyti Thanks, Andi

Re: [Intel-gfx] [PATCH 1/3] drm/i915/mocs: use to_gt() instead of direct >gt

2023-10-03 Thread Andi Shyti
Hi Jani, On Mon, Oct 02, 2023 at 11:47:02AM +0300, Jani Nikula wrote: > Have to give up the const on i915 pointer, but it's not big of a deal > considering non-const i915 gets passed all over the place. > > Signed-off-by: Jani Nikula Reviewed-by: Andi Shyti Thanks, Andi