://patchwork.freedesktop.org/series/82605/)
Anshuman Gupta (16):
drm/i915/hdcp: Update CP property in update_pipe
drm/i915/hdcp: Get conn while content_type changed
drm/i915/hotplug: Handle CP_IRQ for DP-MST
drm/i915/hdcp: DP MST transcoder for link and stream
drm/i915/hdcp: Move HDCP enc status timeout to
Get DRM connector reference count while scheduling a prop work
to avoid any possible destroy of DRM connector when it is in
DRM_CONNECTOR_REGISTERED state.
Fixes: a6597faa2d59 ("drm/i915: Protect workers against disappearing
connectors")
Cc: Sean Paul
Cc: Ramalingam C
Signed-off-by
This requires for HDCP 2.2 MST check link.
Cc: Ramalingam C
Signed-off-by: Anshuman Gupta
---
drivers/gpu/drm/i915/display/intel_display_types.h | 3 ++-
drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 3 ++-
drivers/gpu/drm/i915/display/intel_hdcp.c | 2 +-
drivers/gpu/drm/i915
Pass dig_port as an argument to intel_hdcp_init()
and intel_hdcp2_init().
This will be required for HDCP 2.2 stream encryption.
Cc: Ramalingam C
Signed-off-by: Anshuman Gupta
---
drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 4 ++--
drivers/gpu/drm/i915/display/intel_hdcp.c| 12
that link
in order to enable/disable the stream encryption.
Both of above requirement are same for all Gen with respect to
B.Spec Documentation.
Cc: Ramalingam C
Signed-off-by: Anshuman Gupta
---
drivers/gpu/drm/i915/display/intel_ddi.c | 10 +--
drivers/gpu/drm/i915/display/intel_ddi.h
hdcp_port_data is specific to a port on which HDCP
encryption is getting enabled, so encapsulate it to
intel_digital_port.
This will be required to enable HDCP 2.2 stream encryption.
Cc: Ramalingam C
Signed-off-by: Anshuman Gupta
---
drivers/gpu/drm/i915/display/intel_ddi.c | 2
Add HDCP 2.2 DP MST HDCP2_STREAM_STATUS
and HDCP2_AUTH_STREAM register in i915_reg header.
Cc: Ramalingam C
Signed-off-by: Anshuman Gupta
---
drivers/gpu/drm/i915/i915_reg.h | 30 ++
1 file changed, 30 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b
Enable HDCP 2.2 over DP MST.
Cc: Ramalingam C
Signed-off-by: Anshuman Gupta
---
drivers/gpu/drm/i915/display/intel_hdcp.c | 46 ++-
1 file changed, 44 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c
b/drivers/gpu/drm/i915/display
pdate CP as per the kernel internal
state")
Cc: Ramalingam C
Signed-off-by: Anshuman Gupta
---
drivers/gpu/drm/i915/display/intel_hdcp.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c
b/drivers/gpu/drm/i915/display/intel_hdcp.c
in
used by both HDCP{1.x,2.x} stream status timeout.
Related: 7e90e8d0c0ea ("drm/i915: Increase timeout for Encrypt
status change")
Cc: Ramalingam C
Signed-off-by: Anshuman Gupta
---
drivers/gpu/drm/i915/display/intel_hdcp.c | 9 -
drivers/gpu/drm/i915/display/intel_hdcp.h | 2 +
Handle CP_IRQ in DEVICE_SERVICE_IRQ_VECTOR_ESI0
It requires to call intel_hdcp_handle_cp_irq() in case
of CP_IRQ is triggered by a sink in DP-MST topology.
Cc: "Ville Syrjälä"
Cc: Ramalingam C
Signed-off-by: Anshuman Gupta
---
drivers/gpu/drm/i915/display/intel_dp.c | 14 +++
This requires for HDCP 2.2 MST check link.
Cc: Ramalingam C
Signed-off-by: Anshuman Gupta
---
drivers/gpu/drm/i915/display/intel_display_types.h | 3 ++-
drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 3 ++-
drivers/gpu/drm/i915/display/intel_hdcp.c | 2 +-
drivers/gpu/drm/i915
hdcp_port_data is specific to a port on which HDCP
encryption is getting enabled, so encapsulate it to
intel_digital_port.
This will be required to enable HDCP 2.2 stream encryption.
Cc: Ramalingam C
Signed-off-by: Anshuman Gupta
---
drivers/gpu/drm/i915/display/intel_ddi.c | 2
that link
in order to enable/disable the stream encryption.
Both of above requirement are same for all Gen with respect to
B.Spec Documentation.
Cc: Ramalingam C
Signed-off-by: Anshuman Gupta
---
drivers/gpu/drm/i915/display/intel_ddi.c | 10 +--
drivers/gpu/drm/i915/display/intel_ddi.h
Acked-by: Tomas Winkler
Signed-off-by: Anshuman Gupta
---
drivers/misc/mei/hdcp/mei_hdcp.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/misc/mei/hdcp/mei_hdcp.c b/drivers/misc/mei/hdcp/mei_hdcp.c
index 9ae9669e46ea..3506a3534294 100644
--- a/drivers/misc/mei/hdcp
Get DRM connector reference count while scheduling a prop work
to avoid any possible destroy of DRM connector when it is in
DRM_CONNECTOR_REGISTERED state.
Fixes: a6597faa2d59 ("drm/i915: Protect workers against disappearing
connectors")
Cc: Sean Paul
Cc: Ramalingam C
Signed-off-by
HDCP 2.2 over DP MST
on Gen12.
Cc: Ramalingam C
Signed-off-by: Anshuman Gupta
---
drivers/gpu/drm/i915/display/intel_ddi.c | 2 +-
.../gpu/drm/i915/display/intel_display_types.h| 2 ++
drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +-
drivers/gpu/drm/i915/display
Pass dig_port as an argument to intel_hdcp_init()
and intel_hdcp2_init().
This will be required for HDCP 2.2 stream encryption.
Cc: Ramalingam C
Signed-off-by: Anshuman Gupta
---
drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 4 ++--
drivers/gpu/drm/i915/display/intel_hdcp.c| 12
Add support for multiple mst stream in hdcp port data
which will be used by RepeaterAuthStreamManage msg and
HDCP 2.2 security f/w for m' validation.
v2:
Init the hdcp port data k for HDMI/DP SST strem.
Cc: Ramalingam C
Signed-off-by: Anshuman Gupta
---
.../drm/i915/di
-intel.
[PATCH v3 11/16] drm/hdcp: Max MST content streams
has an Ack from drm-misc maintainer to merge it via dm-intel.
Test-with: 20201023100709.5211-2-karthik@intel.com
Anshuman Gupta (16):
drm/i915/hdcp: Update CP property in update_pipe
drm/i915/hdcp: Get conn while content_type
Let's define Maximum MST content streams up to four
generically which can be supported by modern display
controllers.
Cc: Sean Paul
Cc: Ramalingam C
Acked-by: Maarten Lankhorst
Signed-off-by: Anshuman Gupta
---
include/drm/drm_hdcp.h | 8
1 file changed, 4 insertions(+), 4 dele
Enable HDCP 1.4 over DP MST for Gen12.
This also enable the stream encryption support for
older generations, which was missing earlier.
v2:
- Added debug print for stream encryption.
- Disable the hdcp on port after disabling last stream
encryption.
Cc: Ramalingam C
Signed-off-by: Anshuman
Add HDCP 2.2 DP MST HDCP2_STREAM_STATUS
and HDCP2_AUTH_STREAM register in i915_reg header.
Cc: Ramalingam C
Signed-off-by: Anshuman Gupta
---
drivers/gpu/drm/i915/i915_reg.h | 30 ++
1 file changed, 30 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b
Add support for HDCP 2.2 DP MST shim callback.
This adds existing DP HDCP shim callback for Link Authentication
and Encryption and HDCP 2.2 stream encryption
callback.
Cc: Ramalingam C
Signed-off-by: Anshuman Gupta
---
.../drm/i915/display/intel_display_types.h| 4 +
drivers/gpu/drm/i915
Enable HDCP 2.2 over DP MST.
Cc: Ramalingam C
Signed-off-by: Anshuman Gupta
---
drivers/gpu/drm/i915/display/intel_hdcp.c | 46 ++-
1 file changed, 44 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c
b/drivers/gpu/drm/i915/display
On 2020-10-27 at 11:04:17 +0530, Shankar, Uma wrote:
>
>
> > -Original Message-
> > From: Anshuman Gupta
> > Sent: Friday, October 23, 2020 5:51 PM
> > To: intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org
> > Cc: seanp...@chromium.o
On 2020-10-27 at 11:50:13 +0530, Shankar, Uma wrote:
>
>
> > -Original Message-
> > From: Anshuman Gupta
> > Sent: Friday, October 23, 2020 5:51 PM
> > To: intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org
> > Cc: seanp...@chromium.o
On 2020-10-27 at 11:02:26 +0530, Shankar, Uma wrote:
>
>
> > -Original Message-
> > From: Anshuman Gupta
> > Sent: Friday, October 23, 2020 5:51 PM
> > To: intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org
> > Cc: seanp...@chromium.o
On 2020-10-27 at 11:59:14 +0530, Shankar, Uma wrote:
>
>
> > -Original Message-
> > From: Anshuman Gupta
> > Sent: Friday, October 23, 2020 5:51 PM
> > To: intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org
> > Cc: seanp...@chromium.o
On 2020-10-27 at 12:41:41 +0530, Shankar, Uma wrote:
>
>
> > -Original Message-
> > From: Anshuman Gupta
> > Sent: Friday, October 23, 2020 5:51 PM
> > To: intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org
> > Cc: seanp...@chromium.o
On 2020-10-27 at 11:59:14 +0530, Shankar, Uma wrote:
>
>
> > -Original Message-
> > From: Anshuman Gupta
> > Sent: Friday, October 23, 2020 5:51 PM
> > To: intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org
> > Cc: seanp...@chromium.o
Get DRM connector reference count while scheduling a prop work
to avoid any possible destroy of DRM connector when it is in
DRM_CONNECTOR_REGISTERED state.
Fixes: a6597faa2d59 ("drm/i915: Protect workers against disappearing
connectors")
Cc: Sean Paul
Cc: Ramalingam C
Signed-off-by
Handle CP_IRQ in DEVICE_SERVICE_IRQ_VECTOR_ESI0
It requires to call intel_hdcp_handle_cp_irq() in case
of CP_IRQ is triggered by a sink in DP-MST topology.
Cc: "Ville Syrjälä"
Cc: Ramalingam C
Reviewed-by: Uma Shankar
Signed-off-by: Anshuman Gupta
---
drivers/gpu/drm/i915/display/
used by both HDCP{1.x,2.x} stream status timeout.
Related: 'commit 7e90e8d0c0ea ("drm/i915: Increase timeout for Encrypt
status change")'
Cc: Ramalingam C
Reviewed-by: Uma Shankar
Signed-off-by: Anshuman Gupta
---
drivers/gpu/drm/i915/display/intel_hdcp.c | 9 -
HDCP 2.2 over DP MST
on Gen12.
Cc: Ramalingam C
Reviewed-by: Uma Shankar
Signed-off-by: Anshuman Gupta
---
drivers/gpu/drm/i915/display/intel_ddi.c | 2 +-
.../gpu/drm/i915/display/intel_display_types.h| 2 ++
drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +-
drivers
drm-intel.
[PATCH v4 11/16] drm/hdcp: Max MST content streams
has an Ack from drm-misc maintainer to merge it via dm-intel.
Test-with: 20201023100709.5211-2-karthik@intel.com
Anshuman Gupta (16):
drm/i915/hdcp: Update CP property in update_pipe
drm/i915/hdcp: Get conn while content_type
EGISTERED)
v3:
Commit log improvement. [Uma]
Added a comment before scheduling prop_work. [Uma]
Fixes: 33f9a623bfc6 ("drm/i915/hdcp: Update CP as per the kernel internal
state")
Cc: Ramalingam C
Signed-off-by: Anshuman Gupta
---
drivers/gpu/drm/i915/display/intel_hdcp.c | 8
This requires for HDCP 2.2 MST check link.
Cc: Ramalingam C
Reviewed-by: Uma Shankar
Signed-off-by: Anshuman Gupta
---
drivers/gpu/drm/i915/display/intel_display_types.h | 3 ++-
drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 3 ++-
drivers/gpu/drm/i915/display/intel_hdcp.c | 2
Add support for HDCP 2.2 DP MST shim callback.
This adds existing DP HDCP shim callback for Link Authentication
and Encryption and HDCP 2.2 stream encryption
callback.
v2:
Added a WARN_ON() instead of drm_err. [Uma]
Cosmetic chnages. [Uma]
Cc: Ramalingam C
Signed-off-by: Anshuman Gupta
Pass dig_port as an argument to intel_hdcp_init()
and intel_hdcp2_init().
This will be required for HDCP 2.2 stream encryption.
Cc: Ramalingam C
Reviewed-by: Uma Shankar
Signed-off-by: Anshuman Gupta
---
drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 4 ++--
drivers/gpu/drm/i915/display
that link
in order to enable/disable the stream encryption.
Both of above requirement are same for all Gen with respect to
B.Spec Documentation.
v2:
Cosmetic changes function name, error msg print and
stream typo fixes. [Uma]
Cc: Ramalingam C
Signed-off-by: Anshuman Gupta
---
drivers/gpu/drm
Add support for multiple mst stream in hdcp port data
which will be used by RepeaterAuthStreamManage msg and
HDCP 2.2 security f/w for m' validation.
v2:
Init the hdcp port data k for HDMI/DP SST strem.
v3:
Cosmetic changes. [Uma]
Cc: Ramalingam C
Signed-off-by: Anshuman Gupta
---
..
Add HDCP 2.2 DP MST HDCP2_STREAM_STATUS
and HDCP2_AUTH_STREAM register in i915_reg header.
Cc: Ramalingam C
Reviewed-by: Uma Shankar
Signed-off-by: Anshuman Gupta
---
drivers/gpu/drm/i915/i915_reg.h | 30 ++
1 file changed, 30 insertions(+)
diff --git a/drivers
Acked-by: Tomas Winkler
Reviewed-by: Uma Shankar
Signed-off-by: Anshuman Gupta
---
drivers/misc/mei/hdcp/mei_hdcp.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/misc/mei/hdcp/mei_hdcp.c b/drivers/misc/mei/hdcp/mei_hdcp.c
index 9ae9669e46ea..3506a3534294 100644
Let's define Maximum MST content streams up to four
generically which can be supported by modern display
controllers.
Cc: Sean Paul
Cc: Ramalingam C
Acked-by: Maarten Lankhorst
Reviewed-by: Uma Shankar
Signed-off-by: Anshuman Gupta
---
include/drm/drm_hdcp.h | 8
1 file chang
all encrypted stream encryption is disabled,
disable the port HDCP encryption and deauthenticate the port.
Cc: Ramalingam C
Reviewed-by: Uma Shankar
Signed-off-by: Anshuman Gupta
---
drivers/gpu/drm/i915/display/intel_hdcp.c | 46 ++-
1 file changed, 44 insertions(+), 2
comment. [Uma]
Cc: Ramalingam C
Signed-off-by: Anshuman Gupta
---
drivers/gpu/drm/i915/display/intel_dp_mst.c | 10 ++---
drivers/gpu/drm/i915/display/intel_hdcp.c | 43 ++---
2 files changed, 32 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/i915/display
hdcp_port_data is specific to a port on which HDCP
encryption is getting enabled, so encapsulate it to
intel_digital_port.
This will be required to enable HDCP 2.2 stream encryption.
Cc: Ramalingam C
Reviewed-by: Uma Shankar
Signed-off-by: Anshuman Gupta
---
drivers/gpu/drm/i915/display
e atomic check func, or can be unset yet as in the case of MST
> connectors.
I have also observed the similar crash while using DP-MST setup.
Looks good to me.
Reviewed-by: Anshuman Gupta
>
> This fixes
> [7.940719] Oops: [#1] SMP NOPTI
> [7.944407] CPU: 2 PID: 143 Co
On 2020-10-27 at 16:03:35 +0530, Kamati Srinivas wrote:
> From: Srinivas Kamati
>
> "Content protection type change" igt test results in kernel
> taint. Everytime after prop_work is done we are also
> giving up connector reference, which is resulting in ref
> count underrun.
>
> Before schedulin
known issue
in case these are not known issue could we create bug and rerport the results.
All of the below igt@kms_frontbuffer_tracking are failing due to similar dmesg
warning.
igt@kms_big_fb is odd one out a kernel panic.
Rest of all are gem failures.
Thanks,
Anshuman Gupta.
On 2020-10-28 at 06
ly when there isn't a real PCH.
Cc: Rodrigo Vivi
Signed-off-by: Bob Paauwe
Signed-off-by: Anshuman Gupta
Signed-off-by: Matt Roper
---
.../drm/i915/display/intel_display_power.c| 21 +--
drivers/gpu/drm/i915/i915_irq.c | 6 --
2 files changed, 23 ins
patch [v4,15/16] commit log, i will send
a patch for this.
"drm/i915/hdcp: Support for HDCP 2.2 MST shim callbacks
-:13: WARNING:TYPO_SPELLING: 'chnages' may be misspelled - perhaps 'changes'?"
Thanks,
Anshuman Gupta.
On 2020-10-29 at 17:54:44 +, Patchwork wrote:
>
-by: Anshuman Gupta
---
.../drm/i915/display/intel_display_types.h| 4 +
drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 80 +--
2 files changed, 76 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
b/drivers/gpu/drm/i915/display
On 2020-11-03 at 17:06:42 -0500, Rodrigo Vivi wrote:
> On Fri, Oct 30, 2020 at 11:46:58AM +0530, Anshuman Gupta wrote:
> > From: Bob Paauwe
> >
> > The WA specifies that we need to toggle a SDE chicken bit on and then
> > off as the final step in preparation for s0i
rt &&
> + IS_TIGERLAKE(dev_priv)) {
IMHO we need to use state boolean crtc_state->has_psr2, we can have sink
supports PSR2
but it may not be enabled due to any reason.
Thanks,
Anshuman Gupta.
> + fbc->no_fbc_reason = "not supported with PSR2";
>
On 2020-11-05 at 22:09:12 +0530, Ramalingam C wrote:
> On 2020-10-27 at 22:12:00 +0530, Anshuman Gupta wrote:
> > Pass dig_port as an argument to intel_hdcp_init()
> > and intel_hdcp2_init().
> > This will be required for HDCP 2.2 stream encryption.
> >
> > Cc: R
On 2020-11-05 at 22:15:37 +0530, Ramalingam C wrote:
> On 2020-10-27 at 22:12:05 +0530, Anshuman Gupta wrote:
> > This requires for HDCP 2.2 MST check link.
> >
> > Cc: Ramalingam C
> > Reviewed-by: Uma Shankar
> > Signed-off-by: Anshuman Gupta
> >
On 2020-11-05 at 21:04:03 +0530, Ramalingam C wrote:
> On 2020-10-27 at 22:11:58 +0530, Anshuman Gupta wrote:
> > Both HDCP_{1.x,2.x} requires to select/deselect Multistream HDCP bit
> > in TRANS_DDI_FUNC_CTL in order to enable/disable stream HDCP
> > encryption over
On 2020-11-05 at 22:04:15 +0530, Ramalingam C wrote:
> On 2020-10-27 at 22:12:04 +0530, Anshuman Gupta wrote:
> > Add support for multiple mst stream in hdcp port data
> > which will be used by RepeaterAuthStreamManage msg and
> > HDCP 2.2 security f/w for m' validation.
On 2020-11-05 at 21:11:52 +0530, Ramalingam C wrote:
> On 2020-10-27 at 22:11:59 +0530, Anshuman Gupta wrote:
> > Enable HDCP 1.4 over DP MST for Gen12.
> > This also enable the stream encryption support for
> > older generations, which was missing earlier.
> It will
On 2020-11-06 at 16:42:21 +0530, Ramalingam C wrote:
> On 2020-11-06 at 14:57:25 +0530, Ramalingam C wrote:
> > On 2020-11-03 at 11:57:00 +0530, Anshuman Gupta wrote:
> > > Add support for HDCP 2.2 DP MST shim callback.
> > > This adds existing DP HDCP shim callb
On 2020-05-05 at 19:09:54 +0300, Imre Deak wrote:
> On Tue, May 05, 2020 at 07:39:04AM -0700, Matt Roper wrote:
> > On Tue, May 05, 2020 at 10:20:58AM +0530, Anshuman Gupta wrote:
> > > On 2020-05-04 at 15:52:13 -0700, Matt Roper wrote:
> > > > RKL power wells are s
Currently intel_hdcp_update_pipe() is also getting called for non-hdcp
connectors and got though its conditional code flow, which is completely
unnecessary for non-hdcp connectors, therefore it make sense to
have an early return. No functional change.
Signed-off-by: Anshuman Gupta
---
drivers
No functional change.
Anshuman Gupta (2):
drm/i915/hdcp: Add update_pipe early return
drm/i915/hdcp: No direct access to power_well desc
drivers/gpu/drm/i915/display/intel_hdcp.c | 24 ++-
1 file changed, 10 insertions(+), 14 deletions(-)
--
2.26.0
HDCP code doesn't require to access power_well internal stuff,
instead it should use the intel_display_power_well_is_enabled()
to get the status of desired power_well.
No functional change.
Cc: Jani Nikula
Signed-off-by: Anshuman Gupta
---
drivers/gpu/drm/i915/display/intel_hdcp.c
Shankar
Signed-off-by: Anshuman Gupta
Link: https://patchwork.freedesktop.org/patch/350962/?series=72664&rev=2 #v1
Link: https://patchwork.freedesktop.org/patch/359396/?series=72251&rev=3 #v2
---
drivers/gpu/drm/i915/display/intel_hdcp.c | 27 +++
1 file changed, 23
On 2020-05-15 at 07:56:25 +0100, Chris Wilson wrote:
> Quoting Anshuman Gupta (2020-05-15 07:10:29)
> > Somewhere in the line, state machine to set content protection to
> > DESIRED from kernel was broken and IGT coverage was missing for it.
> > This patch fixes it.
>
On 2020-05-15 at 11:40:29 +0530, Anshuman Gupta wrote:
> Content Protection property should be updated as per the kernel
> internal state. Let's say if Content protection is disabled
> by userspace, CP property should be set to UNDESIRED so that
> reauthentication will not happe
: Anshuman Gupta
---
drivers/gpu/drm/i915/display/intel_hdcp.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c
b/drivers/gpu/drm/i915/display/intel_hdcp.c
index 2cbc4619b4ce..d0a2bee9035a 100644
--- a/drivers/gpu/drm/i915/display
No functional change.
Anshuman Gupta (2):
drm/i915/hdcp: Add update_pipe early return
drm/i915/hdcp: No direct access to power_well desc
drivers/gpu/drm/i915/display/intel_hdcp.c | 23 +--
1 file changed, 9 insertions(+), 14 deletions(-)
--
2.26.0
HDCP code doesn't require to access power_well internal stuff,
instead it should use the intel_display_power_well_is_enabled()
to get the status of desired power_well.
No functional change.
v2:
- used with_intel_runtime_pm instead of get/put. [Jani]
Cc: Jani Nikula
Signed-off-by: Anshuman
f HDCP is already ENABLED.
AFAIU may below patch also solves above issue implicitly.
https://patchwork.freedesktop.org/patch/365758/?series=72251&rev=4
Besides that +1 for below Ram comment, it would be better if such type of
duplicate
enable request should filter by drm_atomic_connector_set_prop
...@vger.kernel.org
Cc: Ville Syrjälä
Cc: Maarten Lankhorst
Signed-off-by: Anshuman Gupta
---
drivers/gpu/drm/i915/display/intel_display.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
On 2020-06-01 at 18:19:44 +0530, Shankar, Uma wrote:
>
>
> > -Original Message-
> > From: Intel-gfx On Behalf Of
> > Anshuman Gupta
> > Sent: Monday, June 1, 2020 3:45 PM
> > To: intel-gfx@lists.freedesktop.org
> > Cc: sta...@vger.kernel.org
>
On 2020-06-01 at 17:11:32 +0300, Ville Syrjälä wrote:
> On Mon, Jun 01, 2020 at 03:45:16PM +0530, Anshuman Gupta wrote:
> > Gen12 hw are failing to enable lpsp configuration due to PG3 was left on
> > due to valid usgae count of POWER_DOMAIN_AUDIO.
> > It is not required to g
pable(connector) &&
> + if (ret && hdcp_debugfs_requested(hdcp, HDCP_VERSION_1_4) &&
IMHO there is no case when both version HDCP 2.2 and HDCP 1.4 version
will be set, i believe for IGT if HDCP 2.2 fails and version is HDCP 2.2
it should have r
On 2020-06-08 at 15:31:03 +0530, Ankit Nautiyal wrote:
> As per the current HDCP design, the driver selects the highest
> version of HDCP that can be used to satisfy the content-protection
> requirements of the user. Due to this, the content-protection
> tests cannot test a lower version of HDCP, i
Debug print for power domain audio get/put.
This will help to deubg the CI s2idle incomplete
failures.
Signed-off-by: Anshuman Gupta
---
drivers/gpu/drm/i915/display/intel_audio.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_audio.c
b/drivers/gpu/drm
On 2020-06-17 at 11:12:12 +0100, Chris Wilson wrote:
> Quoting Anshuman Gupta (2020-06-17 10:50:01)
> > Debug print for power domain audio get/put.
> > This will help to deubg the CI s2idle incomplete
> > failures.
>
> Do we not already print the mismatching pm, and wh
sed.
Cc: Ramalingam C
Cc: Maarten Lankhorst
Reviewed-by: Uma Shankar
Signed-off-by: Anshuman Gupta
Link: https://patchwork.freedesktop.org/patch/350962/?series=72664&rev=2 #v1
Link: https://patchwork.freedesktop.org/patch/359396/?series=72251&rev=3 #v2
---
drivers/gpu/drm/i915/display/i
DP MST stream encryption.
Thanks,
Anshuman Gupta.
> From: Sean Paul
>
> Used to query whether an MST stream is encrypted or not.
>
> Signed-off-by: Sean Paul
>
> Link:
> https://patchwork.freedesktop.org/patch/msgid/20200218220242.107265-14-s...@poorly.run
On 2020-06-30 at 12:48:34 -0400, Sean Paul wrote:
> On Tue, Jun 30, 2020 at 10:21 AM Anshuman Gupta
> wrote:
> >
> > On 2020-06-23 at 21:29:05 +0530, Sean Paul wrote:
> > Hi Sean,
> > I am new to DP MST stuff, I am looking to DP MST spec DP v1.2a.
> > I have l
adds
> connector to the check_link() arguments so we have it when we need it.
>
> Signed-off-by: Sean Paul
Looks good to me, this require a rebase on latest drm-tip
Reviewed-by: Anshuman Gupta
> Link:
> https://patchwork.freedesktop.org/patch/msgid/20200218220242.107265-13-s...
On 2020-06-23 at 21:29:03 +0530, Sean Paul wrote:
> From: Sean Paul
>
> This patch plumbs port through hdcp init instead of relying on
> intel_attached_encoder() to return a non-NULL encoder which won't work
> for MST connectors.
Looks good to me,
Reviewed-by: Anshuman G
udio)
> intel_audio_codec_enable(encoder, pipe_config, conn_state);
> +
> + /* Enable hdcp if it's desired */
> + if (conn_state->content_protection ==
> + DRM_MODE_CONTENT_PROTECTION_DESIRED)
> + intel_hdcp_enable(to_intel_connector(
On 2020-06-23 at 21:28:58 +0530, Sean Paul wrote:
> From: Sean Paul
>
> Add an out label and un-indent hdcp disable in preparation for
> hdcp_mutex. No functional changes
LGTM
Reviewed-by: Anshuman Gupta
>
> Signed-off-by: Sean Paul
> Link:
> https://patchwork.fre
On 2020-07-03 at 16:48:27 +0530, Anshuman Gupta wrote:
> On 2020-06-23 at 21:29:07 +0530, Sean Paul wrote:
> > From: Sean Paul
> >
> > Now that all the groundwork has been laid, we can turn on HDCP 1.4 over
> > MST. Everything except for toggling the HDCP signalling
nd fresh CI results
> > though.
>
> Seems the CI results are already out and we are clean.
Hi Ram ,
CI results are clean for this rebase patch,
Could you please help with merging,
I belive your RB's are valid either-way wrt to your comment.
Thanks,
Anshuman Gupta.
>
> >
int ret;
> > +
> > + if (!enable)
> > + usleep_range(6, 60); /* Bspec says >= 6us */
> > +
> > + ret = intel_ddi_toggle_hdcp_signalling(&intel_dig_port->base,
> > + cpu_transcoder, enable);
> Sean
On 2020-07-02 at 20:07:36 +0530, Anshuman Gupta wrote:
> On 2020-06-30 at 12:48:34 -0400, Sean Paul wrote:
> > On Tue, Jun 30, 2020 at 10:21 AM Anshuman Gupta
> > wrote:
> > >
> > > On 2020-06-23 at 21:29:05 +0530, Sean Paul wrote:
> > > Hi Sean,
> >
While i915 device is in runtime suspend, DRM connector polling
causing device to wakeup from runtime suspend.
This harm overall cpu idle statistics, therefore
disabling polling while in runtime suspend.
Cc: Imre Deak
Signed-off-by: Anshuman Gupta
---
drivers/gpu/drm/i915/i915_drv.c | 4
1
On 2020-07-21 at 16:32:17 +0300, Imre Deak wrote:
> On Fri, Jul 17, 2020 at 05:34:25PM +0530, Anshuman Gupta wrote:
> > While i915 device is in runtime suspend, DRM connector polling
> > causing device to wakeup from runtime suspend.
> > This harm overall cpu idle
nged = true;
> + to_intel_crtc_state(crtc_state)->update_pipe = true;
IMHO intel_crtc_check_fastset() make sure that every crtc_state->mode_changed
will not turn up to a modeset. It seems it is already being taken care.
Thanks,
Anshuman Gupta.
> }
>
255f04006 CR4:
> 003606e0
> <4>[ 20.177386] Call Trace:
> <4>[ 20.177390] seq_read+0xcb/0x420
>
> which is presumably from having no encoder attached at that time.
>
> Fixes: 8806211fe7b3 ("drm/i915: Add i915_lpsp_capability debugfs")
> S
No functional change.
Anshuman Gupta (2):
drm/i915/hdcp: Add update_pipe early return
drm/i915/hdcp: No direct access to power_well desc
drivers/gpu/drm/i915/display/intel_hdcp.c | 23 +--
1 file changed, 9 insertions(+), 14 deletions(-)
--
2.26.2
ff-by: Anshuman Gupta
---
drivers/gpu/drm/i915/display/intel_hdcp.c | 15 +++
1 file changed, 3 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c
b/drivers/gpu/drm/i915/display/intel_hdcp.c
index a1e0d518e529..e76b049618db 100644
--- a/drivers/gp
Signed-off-by: Anshuman Gupta
---
drivers/gpu/drm/i915/display/intel_hdcp.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c
b/drivers/gpu/drm/i915/display/intel_hdcp.c
index 89a4d294822d..a1e0d518e529 100644
--- a/drivers/gpu/drm
On 2020-08-04 at 05:01:37 +0530, Souza, Jose wrote:
> On Fri, 2020-07-24 at 14:39 -0700, Lucas De Marchi wrote:
> > From: Anshuman Gupta <
> > anshuman.gu...@intel.com
> > >
> >
> > DGFX devices have different DMC_DEBUG* counter MMIO address
> > offset
On 2020-08-07 at 22:56:54 +0530, Souza, Jose wrote:
> On Fri, 2020-08-07 at 18:44 +0530, Anshuman Gupta wrote:
> > On 2020-08-04 at 05:01:37 +0530, Souza, Jose wrote:
> > > On Fri, 2020-07-24 at 14:39 -0700, Lucas De Marchi wrote:
> > > > From: Anshuman Gupta <
701 - 800 of 887 matches
Mail list logo
