Tigerlake and newer has two instances of PPS, to support up to two
eDP panels.
Cc: Ville Syrjälä
Cc: Jani Nikula
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_pps.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display
Workaround also needed for alderlake-P.
HSDES: 14010801662
Cc: Matt Roper
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c
b/drivers/gpu/drm
ld be disabled before planes
but it looks safer to switch back to the default refresh rate before
following with the rest of the pipe disable sequence.
BSpec: 49191
BSpec: 49190
Cc: Ville Syrjälä
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_ddi.c
Continuing the conversion from single integrated VBT data to two.
Reviewed-by: Matt Atwood
Cc: Ville Syrjälä
Cc: Jani Nikula
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_bios.c| 53 +---
drivers/gpu/drm/i915/display/intel_bios.h| 1
Continuing the conversion from single integrated VBT data to two, now
handling backlight data.
Reviewed-by: Matt Atwood
Cc: Ville Syrjälä
Cc: Jani Nikula
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_bios.c | 59 +++
drivers/gpu/drm/i915
Continuing the conversion from single integrated VBT data to two, now
handling DSI data.
Reviewed-by: Matt Atwood
Cc: Ville Syrjälä
Cc: Jani Nikula
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/icl_dsi.c | 12 +-
drivers/gpu/drm/i915/display/intel_bios.c
Continuing the conversion from single integrated VBT data to two, now
handling eDP data.
Reviewed-by: Matt Atwood
Cc: Ville Syrjälä
Cc: Jani Nikula
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/g4x_dp.c | 9 ++-
drivers/gpu/drm/i915/display/intel_bios.c
lvds_dither as it is not used.
Reviewed-by: Matt Atwood
Cc: Ville Syrjälä
Cc: Jani Nikula
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_bios.c | 185 +-
drivers/gpu/drm/i915/display/intel_bios.h | 2 +
drivers/gpu/drm/i915/display
Tigerlake and newer has two instances of PPS, to support up to two
eDP panels.
Reviewed-by: Matt Atwood
Cc: Ville Syrjälä
Cc: Jani Nikula
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_pps.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a
Continuing the conversion from single integrated VBT data to two, now
handling PSR data.
Reviewed-by: Matt Atwood
Cc: Ville Syrjälä
Cc: Jani Nikula
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_bios.c | 73 +--
drivers/gpu/drm/i915/display
Allow MIPI DSI ports to be parsed like any other DDI port.
This will be helpful to integrate into just one function the parse of
information about integrated panels(eDP and DSI).
Cc: Ville Syrjälä
Cc: Jani Nikula
Reviewed-by: Matt Atwood
Signed-off-by: José Roberto de Souza
---
drivers/gpu
All the users were converted, now we can drop it.
Reviewed-by: Matt Atwood
Cc: Jani Nikula
Cc: Ville Syrjälä
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_bios.c | 36 ---
drivers/gpu/drm/i915/i915_drv.h | 1 -
2 files changed, 37
On newer platform this opregion call always fails, also it do not
support multiple panels so dropping it.
Reviewed-by: Matt Atwood
Cc: Ville Syrjälä
Cc: Jani Nikula
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_bios.c | 19 +++
1 file changed, 7
: Daniel Vetter
Cc: Gwan-gyeong Mun
Cc: Ville Syrjälä
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_cursor.c | 3 ++-
drivers/gpu/drm/i915/display/intel_display.c | 7 ++-
drivers/gpu/drm/i915/display/intel_psr.c | 6 ++
3 files changed, 14 insertions
There is no users of it, so no need to keep handling for it.
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_fbc.c | 10 +-
drivers/gpu/drm/i915/display/intel_frontbuffer.h | 3 +--
2 files changed, 2 insertions(+), 11 deletions
+
damaged_area_within_plane.y1.
This fixes glitches seen in fbcon caused by typing something in
the terminal.
BSpec: 55229
Cc: Gwan-gyeong Mun
Cc: Ville Syrjälä
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_psr.c | 8 ++--
1 file changed, 2 insertions(+), 6 deletions
to have the damage clip set
otherwise it will update the whole screen and the selective blocks
will not match with expected.
- kms_psr: psr2_*_(mmap_gtt, mmap_cpu, blt and render), all those
tests should be dropped or skipped for display 12+.
Signed-off-by: José Roberto de Souza
---
drivers/gpu
The implementation of two workarounds are missing causing failures
in CI with pre-production HW.
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_psr.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/i915/display
If the do while loop breaks in 'if (!sg_dma_len(sgl))' in the first
iteration, err is uninitialized causing a wrong call to zap_vma_ptes().
Fixes: b12d691ea5e0 ("i915: fix remap_io_sg to verify the pgprot")
Cc: Christoph Hellwig
Signed-off-by: James Ausmus
Signed-off-by: J
This was only reduntant information has_hdmi_sink can do the same job.
set_infoframes() hooks will call intel_write_infoframe() for the
supported infoframes types and it will only be enabled if given type
is set in crtc_state->infoframes.enable.
Cc: Ville Syrjälä
Signed-off-by: José Roberto
assert_hdmi_transcoder_func_disabled() check needed to be dropped.
Cc: Ville Syrjälä
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_ddi.c| 11 ++-
drivers/gpu/drm/i915/display/intel_dp.c | 36 ++---
drivers/gpu/drm/i915/display/intel_dp.h
Both do the same thing and this change help towards the goal of nuke
intel_dp_set_infoframes() completely.
Cc: Ville Syrjälä
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_ddi.c| 5 ++---
drivers/gpu/drm/i915/display/intel_dp_mst.c | 5 +++--
2 files changed, 5
/display: Fill PSR state during hardware
configuration read out")
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_display.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm
/display: Fill PSR state during hardware
configuration read out")
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_display.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm
asked state
to what was programmed to hardware.
Cc: Gwan-gyeong Mun
Cc: Radhakrishna Sripada
Reported-by: Ville Syrjälä
Fixes: 78b772e1a01f ("drm/i915/display: Fill PSR state during hardware
configuration read out"
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i9
ort->set_infoframes() calls.
Cc: Ville Syrjälä
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/g4x_hdmi.c | 22 ++-
drivers/gpu/drm/i915/display/intel_ddi.c | 17 +-
drivers/gpu/drm/i915/display/intel_display.c | 6 ++---
.../drm/i915/d
intel_dp_set_infoframes() call in intel_ddi_post_disable_dp() will
take care to disable all enabled infoframes.
Cc: Ville Syrjälä
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_ddi.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display
lizing ret
here.
Fixes: b12d691ea5e0 ("i915: fix remap_io_sg to verify the pgprot")
Reviewed-by: Christoph Hellwig
Cc: Christoph Hellwig
Signed-off-by: James Ausmus
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/i915_mm.c | 2 +-
1 file changed, 1 insertion(+), 1 delet
tc_cold_block() is called
BSpec: 55480
Cc: Imre Deak
Signed-off-by: José Roberto de Souza
Signed-off-by: Clinton Taylor
Signed-off-by: Matt Roper
---
drivers/gpu/drm/i915/display/intel_display_power.c | 6 ++
drivers/gpu/drm/i915/display/intel_tc.c| 14 ++
drivers/gpu
or reading it, so
lets force it to 1 in this case.
Cc: Stanislav Lisovskiy
Cc: Rodrigo Vivi
Cc: Ville Syrjälä
Signed-off-by: Daniele Ceraolo Spurio
Signed-off-by: Lucas De Marchi
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_bw.c | 2 +-
1 file changed, 1 in
DC3CO is allowed in all the combinations between pipe and port A and B
on alderlake-P.
BSpec: 49196
Cc: Anshuman Gupta
Cc: Gwan-gyeong Mun
Cc: Matt Atwood
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_psr.c | 20
1 file changed, 16
We are missing the implementation of some workarounds to enabled PSR2
in Alderlake P, so to avoid any CI report of issues around PSR2
disabling it until all PSR2 workarounds are implemented.
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_psr.c
MODULAR_FIA_MASK is set in adl_p so we can drop this ealier return
and read registers.
Also to avoid warnings from icl_tc_port_assert_ref_held() when
calling tc_cold_block() in this functions it is necessary to held the
lock.
Cc: Imre Deak
Signed-off-by: José Roberto de Souza
---
drivers/gpu
+
damaged_area_within_plane.y1.
This fixes glitches seen in fbcon caused by typing something in
the terminal.
BSpec: 55229
Reviewed-by: Gwan-gyeong Mun
Cc: Gwan-gyeong Mun
Cc: Ville Syrjälä
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_psr.c | 8 ++--
1 file changed, 2
There is no users of it, so no need to keep handling for it.
Reviewed-by: Gwan-gyeong Mun
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_fbc.c | 10 +-
drivers/gpu/drm/i915/display/intel_frontbuffer.h | 3 +--
2 files changed
-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_cursor.c | 6 ++
drivers/gpu/drm/i915/display/intel_display.c | 7 ++-
drivers/gpu/drm/i915/display/intel_frontbuffer.c | 6 ++
drivers/gpu/drm/i915/i915_drv.h | 2 ++
4 files changed, 16
will leave this task to whoever will fix DC3CO.
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
.../drm/i915/display/intel_display_debugfs.c | 2 -
.../drm/i915/display/intel_display_types.h| 2 -
.../gpu/drm/i915/display/intel_frontbuffer.c | 2 -
drivers/gpu/drm/i9
At this point is sure that HSW and BDW will never have PSR enabled by
default, so here dropping it from device info and cleaning up code.
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_psr.c | 97
drivers/gpu/drm/i915
Cc: Rob Clark
Cc: Deepak Rawat
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/drm_damage_helper.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/drm_damage_helper.c
b/drivers/gpu/drm/drm_damage_helper.c
inde
Cc: Rob Clark
Cc: Deepak Rawat
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/drm_damage_helper.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/drm_damage_helper.c
b/drivers/gpu/drm/drm_damage_helper.c
inde
It started as a code style fix for the lines above 100 col but it
turned out to simplyfications to intel_dp_set_drrs_state().
Now it receives the desired refresh rate type, high or low.
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_drrs.c | 60
will leave this task to whoever will fix DC3CO.
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
.../drm/i915/display/intel_display_debugfs.c | 2 -
.../drm/i915/display/intel_display_types.h| 2 -
.../gpu/drm/i915/display/intel_frontbuffer.c | 2 -
drivers/gpu/drm/i9
intel_dp.c is a 5k lines monster, so moving DRRS out of it to reduce
some lines from it.
Cc: Jani Nikula
Cc: Rodrigo Vivi
Signed-off-by: José Roberto de Souza
---
Documentation/gpu/i915.rst| 14 +-
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm
At this point is sure that HSW and BDW will never have PSR enabled by
default, so here dropping it from device info and cleaning up code.
v2:
- enable psr support for display 9
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_psr.c | 97
José Roberto de Souza (8):
drm/damage_helper: Fix handling of cursor dirty buffers
drm/i915/display: Drop PSR support from HSW and BDW
drm/i915/display: Move DRRS code its own file
drm/i915/display: Some code improvements and code style fixes for DRRS
drm/i915/display: Share code between
-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_cursor.c | 6 ++
drivers/gpu/drm/i915/display/intel_display.c | 7 ++-
drivers/gpu/drm/i915/display/intel_frontbuffer.c | 6 ++
drivers/gpu/drm/i915/i915_drv.h | 2 ++
4 files changed, 16
can change
between high and low refresh rates as needed.
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_display.c | 2 ++
drivers/gpu/drm/i915/display/intel_drrs.c| 9 +
drivers/gpu/drm/i915/display/intel_drrs.h| 4
3 files changed, 15 insertions
Both functions are pretty much equal, with minor changes that can be
handled by a single parameter.
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_drrs.c | 82 +--
1 file changed, 32 insertions(+), 50 deletions(-)
diff --git a/drivers/gpu/drm
- enabling PSR support for display 9, it was left disabled as mistake
- returning in frontbuffer functions to not set fb_tracking.busy/flip_bits
Cc: Gwan-gyeong Mun
Cc: Daniel Vetter
José Roberto de Souza (8):
drm/i915/display: Drop PSR support from HSW and BDW
drm/i915/display: Move DRRS co
Both functions are pretty much equal, with minor changes that can be
handled by a single parameter.
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_drrs.c | 82 +--
1 file changed, 32 insertions(+), 50 deletions(-)
diff --git a/drivers/gpu/drm
will leave this task to whoever will fix DC3CO.
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
.../drm/i915/display/intel_display_debugfs.c | 2 -
.../drm/i915/display/intel_display_types.h| 2 -
.../gpu/drm/i915/display/intel_frontbuffer.c | 2 -
drivers/gpu/drm/i9
intel_dp.c is a 5k lines monster, so moving DRRS out of it to reduce
some lines from it.
Cc: Jani Nikula
Cc: Rodrigo Vivi
Signed-off-by: José Roberto de Souza
---
Documentation/gpu/i915.rst| 14 +-
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm
It started as a code style fix for the lines above 100 col but it
turned out to simplifications to intel_drrs_set_state().
Now it receives the desired refresh rate type, high or low.
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_drrs.c | 60
At this point is sure that HSW and BDW will never have PSR enabled by
default, so here dropping it from device info and cleaning up code.
v2:
- enable psr support for display 9
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_psr.c | 97
setting the busy/flip_bits
Cc: Daniel Vetter
Cc: Gwan-gyeong Mun
Cc: Ville Syrjälä
Cc: Jani Nikula
Cc: Rodrigo Vivi
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_cursor.c| 6 ++
drivers/gpu/drm/i915/display/intel_fb.c| 8 +++-
.../gpu/drm/i915
change
between high and low refresh rates as needed.
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_display.c | 2 ++
drivers/gpu/drm/i915/display/intel_drrs.c| 9 +
drivers/gpu/drm/i915/display/intel_drrs.h| 4
3 files changed, 15 insertions(+)
diff
: José Roberto de Souza
---
Documentation/gpu/i915.rst| 13 +--
drivers/gpu/drm/i915/display/intel_ddi.c | 6 +-
.../drm/i915/display/intel_display_debugfs.c | 6 +-
drivers/gpu/drm/i915/display/intel_dp.c | 6 +-
drivers/gpu/drm/i915/display/intel_drrs.c
intel_dp.c is a 5k lines monster, so moving DRRS out of it to reduce
some lines from it.
Reviewed-by: Rodrigo Vivi
Cc: Jani Nikula
Cc: Rodrigo Vivi
Signed-off-by: José Roberto de Souza
---
Documentation/gpu/i915.rst| 14 +-
drivers/gpu/drm/i915/Makefile
static function
(intel_drrs_set_state)
Reviewed-by: Rodrigo Vivi
Cc: Jani Nikula
Cc: Rodrigo Vivi
Signed-off-by: José Roberto de Souza
---
Documentation/gpu/i915.rst| 13 +--
drivers/gpu/drm/i915/display/intel_ddi.c | 6 +-
.../drm/i915/display/intel_display_debugfs.c
At this point is sure that HSW and BDW will never have PSR enabled by
default, so here dropping it from device info and cleaning up code.
v2:
- enable psr support for display 9
Reviewed-by: Rodrigo Vivi
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display
It started as a code style fix for the lines above 100 col but it
turned out to simplifications to intel_drrs_set_state().
Now it receives the desired refresh rate type, high or low.
v3:
- Fixed the mode refesh rate debug message
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
change
between high and low refresh rates as needed.
Reviewed-by: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_display.c | 2 ++
drivers/gpu/drm/i915/display/intel_drrs.c| 9 +
drivers/gpu/drm/i915/display/intel_drrs.h| 4
3 files
Both functions are pretty much equal, with minor changes that can be
handled by a single parameter.
v3:
- not scheduling work from invalidate operations
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_drrs.c | 82 +--
1 file
will leave this task to whoever will fix DC3CO.
Reviewed-by: Gwan-gyeong Mun
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
.../drm/i915/display/intel_display_debugfs.c | 2 -
.../drm/i915/display/intel_display_types.h| 2 -
.../gpu/drm/i915/display/intel_frontbuffe
setting the busy/flip_bits
Reviewed-by: Gwan-gyeong Mun
Cc: Daniel Vetter
Cc: Gwan-gyeong Mun
Cc: Ville Syrjälä
Cc: Jani Nikula
Cc: Rodrigo Vivi
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_cursor.c| 6 ++
drivers/gpu/drm/i915/display/intel_fb.c
Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_psr.c | 23 ++-
drivers/gpu/drm/i915/i915_reg.h | 4
2 files changed, 26 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/drivers/gpu/drm/i915
As the SU_REGION_START begins at 0, the SU_REGION_END should be number
of lines - 1.
BSpec: 50424
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_psr.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915
BSpec states that the minimum number of frames before selective update
is 2, so making sure this minimum limit is fulfilled.
BSpec: 50422
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_psr.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion
ld be added to pipe_clip and
not saving power.
Cc: Daniel Vetter
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_psr.c | 37 +---
1 file changed, 13 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/i915/di
-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_psr.c | 25
1 file changed, 25 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/drivers/gpu/drm/i915/display/intel_psr.c
index 670b0ceba110f..18e721dde22e2 100644
This is now a requirement for all display 12 and newer, not only for
tigerlake.
BSpec: 50422
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_fbc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915
but will need to
be aligned with DSC when the PSRS + DSC support lands
BSpec: 50422
BSpec: 50424
Cc: Gwan-gyeong Mun
Cc: Anusha Srivatsa
Signed-off-by: José Roberto de Souza
Signed-off-by: Gwan-gyeong Mun
---
drivers/gpu/drm/i915/display/intel_psr.c | 43 ++--
drivers
t;get_config()")
Cc: Lucas De Marchi
Cc: Ville Syrjälä
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_ddi.c | 19 ---
drivers/gpu/drm/i915/i915_reg.h | 3 ---
2 files changed, 16 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/
This workaround is also applicable to xelpd display so extending it.
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_display_power.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display
Same bit was required for Wa_14012131227 in DG1 now it is also
required as Wa_1508744258 to TGL, RKL, DG1, ADL-S and ADL-P.
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a
This workaround is not needed for platforms with display 13.
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_display_power.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display
Alderlake-P have different values for MBUS DBOX A credits depending
if MBUS join is enabled or not.
BSpec: 50343
BSpec: 54369
Cc: Matt Atwood
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_display.c | 16
1 file changed, 12 insertions(+), 4
From: Lucas De Marchi
Most of the places are using this format so lets consolidate it.
Signed-off-by: José Roberto de Souza
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 2 +-
drivers/gpu/drm/i915/display/intel_cursor.c| 2 +-
drivers/gpu
Alderlake-P PCODE is returning 4 memory channels while it has a
maximum of 2.
So adding this limit and printing a debug message but the real fix
will need to come from PCODE.
HSDES: 22013272110
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/intel_dram.c | 4
1 file changed
BSpec: 54370
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c
b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index
Most of the places are using this format so lets consolidate it.
v2:
- split patch in two: display and non-display because of conflicts
between drm-intel-gt-next x drm-intel-next
Reviewed-by: Matt Roper
Signed-off-by: José Roberto de Souza
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm
This workaround is not needed for platforms with display 13.
Cc: Gwan-gyeong Mun
Reviewed-by: Matt Roper
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_display_power.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm
Same bit was required for Wa_14012131227 in DG1 now it is also
required as Wa_1508744258 to TGL, RKL, DG1, ADL-S and ADL-P.
Cc: Gwan-gyeong Mun
Reviewed-by: Matt Roper
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 7 +++
1 file changed, 7
This workaround is also applicable to xelpd display so extending it.
Cc: Gwan-gyeong Mun
Reviewed-by: Matt Roper
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_display_power.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm
Most of the places are using this format so lets consolidate it.
v2:
- split patch in two: display and non-display because of conflicts
between drm-intel-gt-next x drm-intel-next
Reviewed-by: Matt Roper
Signed-off-by: José Roberto de Souza
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm
BSpec: 54370
Cc: Gwan-gyeong Mun
Reviewed-by: Matt Roper
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c
b/drivers/gpu/drm/i915/gt
-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_psr.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/drivers/gpu/drm/i915/display/intel_psr.c
index 1c41042841fb1..7316967aba94b 100644
--- a/drivers/gpu/drm/i915
xelpd platforms also requires that FBC is disabled when PSR2 is
enabled so extending it.
BSpec: 50422
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_fbc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm
this patch is possible to see a mouse movement lag in Gnome
when PSR2 selective fetch is enabled.
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_cursor.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm
Without this planes that were added by intel_psr2_sel_fetch_update()
that intersect with pipe damaged area will not
have skl_program_plane() and intel_psr2_program_plane_sel_fetch()
called, causing panel to not be properly updated.
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
Power wells are only part of display block and not necessary when
running a headless driver.
Reviewed-by: Radhakrishna Sripada
Cc: Lucas De Marchi
Signed-off-by: José Roberto de Souza
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display_power.c | 5 -
1 file changed
Return ealier in the functions doing interruption setup for GEN8+ also
adding a warning in gen8_de_irq_handler() to let us know that
something else is still missing.
Reviewed-by: Radhakrishna Sripada
Cc: Ville Syrjälä
Cc: Lucas De Marchi
Signed-off-by: José Roberto de Souza
Signed-off-by
splay.
Reviewed-by: Radhakrishna Sripada
Cc: Lucas De Marchi
Signed-off-by: José Roberto de Souza
Signed-off-by: Jani Nikula
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display.c | 44 +++
.../drm/i915/display/intel_display_power.c
This reverts commit 71c1a4998320962f7b8362b2c5ee36610d49e8fb.
The proper fix is Wa_14013723622, so now we can revert this WA and
get back some power savings.
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_psr.c | 16 +---
1 file
This WA fix some display glitches when the system is under high
memory pressure.
BSpec: 52890
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/i915_reg.h | 3 +++
drivers/gpu/drm/i915/intel_pm.c | 5 +
2 files changed, 8 insertions(+)
diff --git a/drivers
PSR2 is defeatured for RKL and ADL-S, no important power impact as
those are desktop CPUs and PSR2 was not even enabled by default yet
in platforms without PSR2 HW tracking.
HSDES: 14011750631
HSDES: 14011741325
BSpec: 53273
Cc: Caz Yokoyama
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de
Fix redundant condition, caught in cppcheck by kernel test robot.
Reported-by: kernel test robot
Cc: Gwan-gyeong Mun
Fixes: b64d6c51380b ("drm/i915/display: Support PSR Multiple Instances")
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_psr.c | 3 +
like frontbuffer modifications and CRC.
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_ddi.c | 2 +
drivers/gpu/drm/i915/display/intel_display.c | 5 +++
drivers/gpu/drm/i915/display/intel_psr.c | 47
drivers/gpu/drm
This workaround requires that VIDEO_DIP_ENABLE_VSC_HSW is never set
with PSR.
BSpec: 54369
BSpec: 54077
Cc: Matt Atwood
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_hdmi.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu
g hardware configuration read
out" it is possible.
Cc: Gwan-gyeong Mun
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_dp.c | 8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/dis
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