[PATCH 9/9 v2] vfio pci: Add vfio iommu implementation for FSL_PAMU

This patch adds vfio iommu support for Freescale IOMMU (PAMU - Peripheral Access Management Unit). The Freescale PAMU is an aperture-based IOMMU with the following characteristics. Each device has an entry in a table in memory describing the iova->phys mapping. The mapping has: -an overall ape

[PATCH 8/9 v2] vfio: moving some functions in common file

Some function defined in vfio_iommu_type1.c are generic (not specific or type1 iommu) and we want to use these for FSL IOMMU (PAMU) and going forward in iommu-none driver. So I have created a new file naming vfio_iommu_common.c and moved some of generic functions into this file. I Agree (with Alex

[PATCH 7/9 v2] pci: msi: Extend msi iova setting interface to powerpc arch

Now we Keep track of devices which have msi page mapping to specific iova page for all msi bank. When composing MSI address and data then this list will be traversed. If device found in the list then use configured iova page otherwise iova page will be taken as before. Signed-off-by: Bharat Bhusha

[PATCH 6/9 v2] powerpc: pci: Extend msi iova page setup to arch specific

This patch extend the interface to arch specific code for setting msi iova address for a msi page. Machine specific code is not yet implemented. Signed-off-by: Bharat Bhushan --- v2 - new patch arch/powerpc/include/asm/machdep.h |2 ++ arch/powerpc/kernel/msi.c | 10 ++

[PATCH 3/9 v2] powerpc: pci: Add arch specific msi region interface

This patch adds the interface to get the msi region information from arch specific code. The machine spicific code is not yet defined. Signed-off-by: Bharat Bhushan --- v1->v2 - None arch/powerpc/include/asm/machdep.h |8 arch/powerpc/kernel/msi.c | 18 +

[PATCH 0/9 v2] vfio-pci: add support for Freescale IOMMU (PAMU)

From: Bharat Bhushan PAMU (FSL IOMMU) has a concept of primary window and subwindows. Primary window corresponds to the complete guest iova address space (including MSI space), with respect to IOMMU_API this is termed as geometry. IOVA Base of subwindow is determined from the number of subwindows

[PATCH 5/9 v2] pci/msi: interface to set an iova for a msi region

This patch defines an interface by which a msi page can be mapped to a specific iova page. This is a requirement in aperture type of IOMMUs (like Freescale PAMU), where we map msi iova page just after guest memory iova address. Signed-off-by: Bharat Bhushan --- v2 - new patch drivers/pci/msi.

[PATCH 4/9 v2] powerpc: msi: Extend the msi region interface to get info from fsl_msi

The FSL MSI will provide the interface to get: - Number of MSI regions (which is number of MSI banks for powerpc) - Get the region address range: Physical page which have the address/addresses used for generating MSI interrupt and size of the page. These are required to create IOMMU (F

[PATCH 1/9 v2] pci:msi: add weak function for returning msi region info

In Aperture type of IOMMU (like FSL PAMU), VFIO-iommu system need to know the MSI region to map its window in h/w. This patch just defines the required weak functions only and will be used by followup patches. Signed-off-by: Bharat Bhushan --- v1->v2 - Added description on "struct msi_region"

[PATCH 2/9 v2] pci: msi: expose msi region information functions

So by now we have defined all the interfaces for getting the msi region, this patch expose the interface to linux subsystem. These will be used by vfio subsystem for setting up iommu for MSI interrupt of direct assignment devices. Signed-off-by: Bharat Bhushan --- v1->v2 - None include/linux/p

RE: [PATCH] iommu/fsl_pamu: use physical cpu index to find the matched cpu nodes

> -Original Message- > From: Wood Scott-B07421 > Sent: Tuesday, November 19, 2013 8:34 AM > To: Sethi Varun-B16395 > Cc: Wang Haiying-R54964; j...@8bytes.org; iommu@lists.linux- > foundation.org; linuxppc-...@lists.ozlabs.org > Subject: Re: [PATCH] iommu/fsl_pamu: use physical cpu index t

Re: [PATCH] iommu/fsl_pamu: use physical cpu index to find the matched cpu nodes

On Mon, 2013-11-18 at 20:42 -0600, Varun Sethi wrote: > For the DSP case again we have to set up the stash attribute. Are you saying > that this should be a separate attribute? Not necessarily a separate attribute, but there should be some way to distinguish whether you're providing a Linux cpu n

RE: [PATCH] iommu/fsl_pamu: use physical cpu index to find the matched cpu nodes

For the DSP case again we have to set up the stash attribute. Are you saying that this should be a separate attribute? -Varun > -Original Message- > From: Wood Scott-B07421 > Sent: Tuesday, November 19, 2013 1:07 AM > To: Sethi Varun-B16395 > Cc: Wang Haiying-R54964; j...@8bytes.org; io

RE: [RFC PATCH] Crashdump Accepting Active IOMMU

Thank you for testing this RFC patch. It is great to have confirmation that the code works in a different test environment. You asked: "What is the status of this patch?" I have made a few changes since the RFC version of this patch: 1. Consolidated all of the operational code into the "copy...

Re: [PATCH] iommu/fsl_pamu: use physical cpu index to find the matched cpu nodes

On Thu, 2013-11-14 at 21:16 -0600, Sethi Varun-B16395 wrote: > Haiying/Scott, > Forgot to mention this, the PAMU driver has to handle stash destination > settings both for power and dsp cores (on B4 platform). For the dsp > cores we would expect the physical core id (not controlled by Linux). > To

Re: [PATCH 4/9] xen: Add xen_create_contiguous_region

On Wed, Nov 13, 2013 at 10:50:58AM +, Liu, Jijiang wrote: > Hi, > > I have a question about xen_create_contiguous_region function, in which > kernel version was it introduced? You can use 'git annotate' to figure out which commit introduced it. Then you can use 'git tag --contains ' to find