On Thu, 23 Jul 2015 19:26:11 +0100
David Daney wrote:
> On 07/23/2015 09:52 AM, Mark Rutland wrote:
> [...]
> > +MSI clients
> > +===
> > +
> > +MSI clients are devices which generate MSIs. For each MSI they wish to
> > +generate, the doorbell and payload may be configured, though sideban
Hi Mark,
This looks sane, and lets me describe the thing I have on my desk, so
I'm happy. I have a couple of general thoughts below, but I don't intend
that they should stand in the way of this proposal as-is.
On 23/07/15 17:52, Mark Rutland wrote:
The existing IOMMU bindings are able to spe
Hi Will,
> -Original Message-
> From: linux-arm-msm-ow...@vger.kernel.org [mailto:linux-arm-msm-
> ow...@vger.kernel.org] On Behalf Of Will Deacon
> Sent: Tuesday, July 21, 2015 8:31 PM
> To: Sricharan R
> Cc: linux-arm-ker...@lists.infradead.org;
iommu@lists.linux-foundation.org;
> device
Hi Stephen,
> -Original Message-
> From: linux-arm-kernel [mailto:linux-arm-kernel-
> boun...@lists.infradead.org] On Behalf Of Stephen Boyd
> Sent: Tuesday, July 21, 2015 11:48 PM
> To: Sricharan R
> Cc: devicet...@vger.kernel.org; linux-arm-...@vger.kernel.org;
> will.dea...@arm.com; iom
Hi,
> This looks sane, and lets me describe the thing I have on my desk, so
> I'm happy. I have a couple of general thoughts below, but I don't intend
> that they should stand in the way of this proposal as-is.
Good to hear that this doesn't fall apart at the sight of a real system!
> On 23/07
[+cc Tejun, linux-ide]
On Thu, Jul 23, 2015 at 11:22 PM, Andreas Hartmann
wrote:
> On Tue, Jul 21, 2015 at 06:35PM +0200, Joerg Roedel wrote:
>> On Tue, Jul 21, 2015 at 06:20:23PM +0200, Andreas Hartmann wrote:
>>> [ 48.193901] <6>[fglrx] Firegl kernel thread PID: 1840
>>> [ 48.193985] <6>[fg
Hi Tony,
On 07/23/2015 11:30 PM, Tony Lindgren wrote:
> * Suman Anna [150723 09:25]:
>> Hi Tony,
>>
>> On 07/23/2015 02:24 AM, Tony Lindgren wrote:
>>> * Suman Anna [150722 09:25]:
On 07/22/2015 12:26 AM, Tony Lindgren wrote:
>
> I don't like using syscon for tinkering directly with
On Fri, Jul 24, 2015 at 06:24:26AM +0100, Yong Wu wrote:
> On Tue, 2015-07-21 at 18:11 +0100, Will Deacon wrote:
> > On Thu, Jul 16, 2015 at 10:04:32AM +0100, Yong Wu wrote:
> > > +/* level 2 pagetable */
> > > +#define ARM_SHORT_PTE_TYPE_LARGE BIT(0)
> > > +#define ARM_SHORT_PTE_SMAL
On Fri, Jul 24, 2015 at 06:43:13AM +0100, Yong Wu wrote:
> On Tue, 2015-07-21 at 15:59 +0100, Will Deacon wrote:
> > On Thu, Jul 16, 2015 at 10:04:34AM +0100, Yong Wu wrote:
> > > +static void mtk_iommu_tlb_flush_all(void *cookie)
> > > +{
> > > + struct mtk_iommu_domain *domain = cookie;
> >
On Thu, Jul 16, 2015 at 6:09 AM, Joerg Roedel wrote:
> Hi Will,
>
> On Thu, Jul 16, 2015 at 11:23:26AM +0100, Will Deacon wrote:
>> On Thu, Jul 16, 2015 at 09:30:43AM +0100, Joerg Roedel wrote:
>> > +struct of_phandle_args *of_alloc_phandle_args(int size)
>> > +{
>> > + struct of_phandle_args *a
looks good. possible to describe the chip we have.
> On Jul 23, 2015, at 9:52 AM, Mark Rutland wrote:
>
> Currently msi-parent is used by a few bindings to describe the
> relationship between a PCI root complex and a single MSI controller, but
> this property does not have a generic binding docum
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