[PATCH v2 06/10] iommu/vt-d: Add basic SVM PASID support

2015-10-13 Thread David Woodhouse
This provides basic PASID support for endpoint devices, tested with a version of the i915 driver. Signed-off-by: David Woodhouse --- drivers/iommu/Kconfig | 1 + drivers/iommu/intel-iommu.c | 111 drivers/iommu/intel-svm.c | 291 ++

[PATCH v2 10/10] iommu/vt-d: Add callback to device driver on page faults

2015-10-13 Thread David Woodhouse
Signed-off-by: David Woodhouse --- drivers/iommu/intel-iommu.c | 3 ++- drivers/iommu/intel-svm.c | 26 +- include/linux/intel-iommu.h | 3 +++ include/linux/intel-svm.h | 21 ++--- 4 files changed, 48 insertions(+), 5 deletions(-) diff --git a/drive

[PATCH v2 09/10] iommu/vt-d: Implement page request handling

2015-10-13 Thread David Woodhouse
Largely based on the driver-mode implementation by Jesse Barnes. Signed-off-by: David Woodhouse --- drivers/iommu/intel-iommu.c | 22 +- drivers/iommu/intel-svm.c | 173 include/linux/intel-iommu.h | 26 +++ 3 files changed, 220 insertions

[PATCH v2 07/10] iommu/vt-d: Implement deferred invalidate for SVM

2015-10-13 Thread David Woodhouse
Signed-off-by: David Woodhouse --- drivers/iommu/intel-iommu.c | 2 ++ drivers/iommu/intel-svm.c | 9 + include/linux/dma_remapping.h | 1 + 3 files changed, 12 insertions(+) diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c index 4c462ab..787cd6e 100644 --- a/

[PATCH v2 08/10] iommu/vt-d: Generalise DMAR MSI setup to allow for page request events

2015-10-13 Thread David Woodhouse
Signed-off-by: David Woodhouse --- drivers/iommu/dmar.c| 42 +++--- include/linux/intel-iommu.h | 10 +- 2 files changed, 40 insertions(+), 12 deletions(-) diff --git a/drivers/iommu/dmar.c b/drivers/iommu/dmar.c index 8757f8d..80e3c17 100644 -

[PATCH v2 05/10] iommu/vt-d: Always enable PASID/PRI PCI capabilities before ATS

2015-10-13 Thread David Woodhouse
The behaviour if you enable PASID support after ATS is undefined. So we have to enable it first, even if we don't know whether we'll need it. This is safe enough; unless we set up a context that permits it, the device can't actually *do* anything with it. Signed-off-by: David Woodhouse --- driv

[PATCH v2 04/10] iommu/vt-d: Assume BIOS lies about ATSR for integrated gfx

2015-10-13 Thread David Woodhouse
If the device itself reports ATS in its PCIe capabilities, but the BIOS neglects to provide an ATSR structure to indicate that the root port can also cope, then assume the latter is lying. Signed-off-by: David Woodhouse --- drivers/iommu/intel-iommu.c | 11 --- 1 file changed, 8 insertio

[PATCH v2 03/10] iommu/vt-d: Add initial support for PASID tables

2015-10-13 Thread David Woodhouse
Add CONFIG_INTEL_IOMMU_SVM, and allocate PASID tables on supported hardware. Signed-off-by: David Woodhouse --- drivers/iommu/Kconfig | 8 ++ drivers/iommu/Makefile | 1 + drivers/iommu/intel-iommu.c | 14 ++ drivers/iommu/intel-svm.c | 65 +

[PATCH v2 02/10] iommu/vt-d: Introduce intel_iommu=pasid28, and pasid_enabled() macro

2015-10-13 Thread David Woodhouse
As long as we use an identity mapping to work around the worst of the hardware bugs which caused us to defeature it and change the definition of the capability bit, we *can* use PASID support on the devices which advertised it in bit 28 of the Extended Capability Register. Allow people to do so wi

[PATCH v2 01/10] iommu/vt-d: Use plain writeq() for dmar_writeq() where available

2015-10-13 Thread David Woodhouse
Signed-off-by: David Woodhouse --- include/linux/intel-iommu.h | 14 ++ 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h index 6240063..08802b9 100644 --- a/include/linux/intel-iommu.h +++ b/include/linux/intel-iom

[PATCH v2 0/10] Enable SVM for Intel VT-d

2015-10-13 Thread David Woodhouse
This patch set enables PASID support for the Intel IOMMU, along with page request support. Like its AMD counterpart, it exposes an IOMMU-specific API. I believe we'll have a session at the Kernel Summit later this month in which we can work out a generic API which will cover the two (now) existing

Re: [PATCH] iommu/vt-d: fix range computation when making room for large pages

2015-10-13 Thread Christian Zander
On Tue, Oct 13, 2015 at 12:37 PM, David Woodhouse wrote: > On Wed, 2015-06-10 at 09:41 -0700, Christian Zander wrote: > > In preparation for the installation of a large page, any small page > > tables that may still exist in the target IOV address range are > > removed. However, if a scatter/gat

Re: [PATCH] iommu/vt-d: fix range computation when making room for large pages

2015-10-13 Thread David Woodhouse
On Wed, 2015-06-10 at 09:41 -0700, Christian Zander wrote: > In preparation for the installation of a large page, any small page > tables that may still exist in the target IOV address range are > removed. However, if a scatter/gather list entry is large enough to > fit more than one large page, t

Re: [PATCH v4] iommu/arm-smmu: Add support for MSI on SMMUv3

2015-10-13 Thread Mark Rutland
> +++ b/Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt > @@ -36,5 +36,25 @@ the PCIe specification. >NOTE: this only applies to the SMMU itself, not >masters connected upstream of the SMMU. > > +- msi-parent : phandles (and potential De

[PATCH v4] iommu/arm-smmu: Add support for MSI on SMMUv3

2015-10-13 Thread Marc Zyngier
Despite being a platform device, the SMMUv3 is capable of signaling interrupts using MSIs. Hook it into the platform MSI framework and enjoy faults being reported in a new and exciting way. Signed-off-by: Marc Zyngier --- * From v3: - Pass the device as a parameter to the MSI destructor (instea

Re: [PATCH v3] iommu/arm-smmu: Add support for MSI on SMMUv3

2015-10-13 Thread Marc Zyngier
On 13/10/15 16:41, Will Deacon wrote: > Hi Marc, > > On Thu, Oct 08, 2015 at 03:52:00PM +0100, Marc Zyngier wrote: >> Despite being a platform device, the SMMUv3 is capable of signaling >> interrupts using MSIs. Hook it into the platform MSI framework and >> enjoy faults being reported in a new an

[PATCH RESEND] iommu/amd: Fix BUG when faulting a PROT_NONE VMA

2015-10-13 Thread Jay Cornwall
handle_mm_fault indirectly triggers a BUG in do_numa_page when given a VMA without read/write/execute access. Check this condition in do_fault. do_fault -> handle_mm_fault -> handle_pte_fault -> do_numa_page mm/memory.c 3147 static int do_numa_page(struct mm_struct *mm, struct vm_area_st...

Re: [PATCH v3] iommu/arm-smmu: Add support for MSI on SMMUv3

2015-10-13 Thread Will Deacon
Hi Marc, On Thu, Oct 08, 2015 at 03:52:00PM +0100, Marc Zyngier wrote: > Despite being a platform device, the SMMUv3 is capable of signaling > interrupts using MSIs. Hook it into the platform MSI framework and > enjoy faults being reported in a new and exciting way. > > Signed-off-by: Marc Zyngie

[RFI] WARNING: CPU: 0 PID: 14493 at drivers/iommu/intel-iommu.c:2048 __domain_mapping+0x37d/0x390()

2015-10-13 Thread Jinpu Wang
Hi experts, We hit warning below during test: [13560.541562] ERROR: DMA PTE for vPFN 0xc3a00 already set (to 42834a003 not 114600083) [13560.541696] [ cut here ] [13560.541701] WARNING: CPU: 0 PID: 22427 at drivers/iommu/intel-iommu.c:2048 __domain_mapping+0x37d/0x390() [1

Re: [RFI] WARNING: CPU: 0 PID: 14493 at drivers/iommu/intel-iommu.c:2048 __domain_mapping+0x37d/0x390()

2015-10-13 Thread Jinpu Wang
On Mon, Oct 12, 2015 at 3:29 PM, Jinpu Wang wrote: > Hi experts, > > We hit warning below during test: > > [13560.541562] ERROR: DMA PTE for vPFN 0xc3a00 already set (to > 42834a003 not 114600083) > [13560.541696] [ cut here ] > [13560.541701] WARNING: CPU: 0 PID: 22427 at

[RFC/PATCH] media: omap3isp: Set maximum DMA segment size

2015-10-13 Thread Laurent Pinchart
The maximum DMA segment size controls the IOMMU mapping granularity. Its default value is 64kB, resulting in potentially non-contiguous IOMMU mappings. Configure it to 4GB to ensure that buffers get mapped contiguously. Signed-off-by: Laurent Pinchart --- drivers/media/platform/omap3isp/isp.c |

Re: [PATCH v6 0/3] arm64: IOMMU-backed DMA mapping

2015-10-13 Thread Robin Murphy
Hi Joerg, On 01/10/15 20:13, Robin Murphy wrote: Hi all, Here's the latest, and hopefully last, revision of the initial arm64 IOMMU dma_ops support. There are a couple of dependencies still currently in -next and the intel-iommu tree[0]: "iommu: iova: Move iova cache management to the iova lib

[git pull] IOMMU Fixes for Linux v4.3-rc5

2015-10-13 Thread Joerg Roedel
Hi Linus, The following changes since commit 9ffecb10283508260936b96022d4ee43a7798b4c: Linux 4.3-rc3 (2015-09-27 07:50:08 -0400) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu.git tags/iommu-fixes-v4.3-rc5 for you to fetch changes up to 5a

Re: [v7,58/60] PCI: Introduce resource_disabled()

2015-10-13 Thread Michael Ellerman
On Thu, 2015-08-10 at 21:39:17 UTC, Yinghai Lu wrote: > Current is using !flags, and we are going to use > IORESOURCE_DISABLED instead of clearing resource flags. > > Let's convert all !flags to helper function resource_disabled(). > resource_disabled will check !flags and IORESOURCE_DISABLED both