Due to Errata#27704 CN88xx SMMUv2,supports only shared ASID and VMID
namespaces; specifically within a given node SMMU0 and SMMU1 share,
as does SMMU2 and SMMU3.
This patch make sures ASID and VMID space is unique across cavium SMMUv2.
changes from V3:
- Removed redundent variable.
chan
Thanks!
Vincent Wan.
> -Original Message-
> From: Joerg Roedel [mailto:j...@8bytes.org]
> Sent: Friday, February 26, 2016 10:45 PM
> To: Wan, Vincent
> Cc: iommu@lists.linux-foundation.org; Suthikulpanit, Suravee; Borislav Petkov;
> Huang, Ray; Xue, Ken; v...@iommu.org; mcuos@gmail.c
On Mon, Feb 29, 2016 at 01:46:19PM +, Robin Murphy wrote:
> Document how the generic "iommus" binding should be used to describe ARM
> SMMU stream IDs instead of the old "mmu-masters" binding.
>
> Signed-off-by: Robin Murphy
> ---
> .../devicetree/bindings/iommu/arm,smmu.txt | 40
>
On Mon, Feb 29, 2016 at 01:46:10PM +, Robin Murphy wrote:
> From: Mark Rutland
>
> The existing IOMMU bindings are able to specify the relationship between
> masters and IOMMUs, but they are insufficient for describing the general
> case of hotpluggable busses such as PCI where the set of mas
Hi,
On Wed, Mar 2, 2016 at 10:54 AM, Yong Wu wrote:
> Sometimes it is not worth for the iommu allocating big chunks.
> Here we enable DMA_ATTR_ALLOC_SINGLE_PAGES which could help avoid to
> allocate big chunks while iommu allocating buffer.
>
> More information about this attribute, please check
>>From: Eric Auger
>>Sent: Tuesday, March 1, 2016 11:57 PM
>>To: eric.au...@st.com; eric.au...@linaro.org; robin.mur...@arm.com;
>>alex.william...@redhat.com; will.dea...@arm.com; j...@8bytes.org;
>>t...@linutronix.de; >>ja...@lakedaemon.net; marc.zyng...@arm.com;
>>christoffer.d...@linaro.or
MIC x200 NTB forwards PCIe traffic using multiple alien RID. They have to
be added as aliases to the DMA device in order to allow buffer access
when IOMMU is enabled.
Signed-off-by: Jacek Lawrynowicz
Acked-by: David Woodhouse
---
Updated quirk comment with requirement that aliases have to be ma
This patch solves IOMMU support issues with PCIe non-transparent bridges
that use Requester ID look-up tables (RID-LUT), e.g. PEX8733.
The NTB connects devices in two independent PCI domains. Devices
separated by the NTB are not able to discover each other. A PCI packet
being forwared from one dom
This patch solves IOMMU support issues with PCIe non-transparent bridges
that use Requester ID look-up tables (RID-LUT), e.g. PEX8733.
The NTB connects devices in two independent PCI domains. Devices
separated by the NTB are not able to discover each other. A PCI packet
being forwared from one dom
Hi Linus,
The following changes since commit 81f70ba233d5f660e1ea5fe23260ee323af5d53a:
Linux 4.5-rc5 (2016-02-20 13:39:35 -0800)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu.git
tags/iommu-fixes-v4.5-rc6
for you to fetch changes up to e6
On Thu, Mar 03, 2016 at 09:05:39AM +0900, Simon Horman wrote:
> On Thu, Mar 03, 2016 at 12:46:30AM +0900, Magnus Damm wrote:
> > On Wed, Mar 2, 2016 at 11:55 PM, Joerg Roedel wrote:
> > > On Mon, Feb 29, 2016 at 11:33:09PM +0900, Magnus Damm wrote:
> > >> From: Magnus Damm
> > >>
> > >> Update th
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