[PATCH] iommu/vt-d: reduce extra first level entry in iommu->domains

2016-05-20 Thread Wei Yang
In commit <8bf478163e69> ("iommu/vt-d: Split up iommu->domains array"), it it splits iommu->domains in two levels. Each first level contains 256 entries of second level. In case of the ndomains is exact a multiple of 256, it would have one more extra first level entry for current implementation. T

Re: [PATCH v9 0/7] KVM PCIe/MSI passthrough on ARM/ARM64: kernel part 3/3: vfio changes

2016-05-20 Thread Eric Auger
Alex, Robin, While my 3 part series primarily addresses the problematic of mapping MSI doorbells into arm-smmu, it fails in : 1) determining whether the MSI controller is downstream or upstream to the IOMMU, => indicates whether the MSI doorbell must be mapped => participates in t

Re: [PATCH] iommu/exynos: Suppress unbinding to prevent system failure

2016-05-20 Thread Krzysztof Kozlowski
On 05/20/2016 03:48 PM, Marek Szyprowski wrote: > Removal of IOMMU driver cannot be done reliably, so Exynos IOMMU driver > doesn't support this operation. It is essential for system operation, so > it makes sense to prevent unbinding by disabling bind/unbind sysfs > feature for SYSMMU controller d

[PATCH] iommu/exynos: Suppress unbinding to prevent system failure

2016-05-20 Thread Marek Szyprowski
Removal of IOMMU driver cannot be done reliably, so Exynos IOMMU driver doesn't support this operation. It is essential for system operation, so it makes sense to prevent unbinding by disabling bind/unbind sysfs feature for SYSMMU controller driver to avoid kernel ops or trashing memory caused by s

Re: [PATCH V5 6/7] iommu/msm: Use writel_relaxed and add a barrier

2016-05-20 Thread Arnd Bergmann
On Friday 20 May 2016 13:44:10 Arnd Bergmann wrote: > > #define GET_CTX_REG(reg, base, ctx) \ > > (readl((base) + (reg) + ((ctx) << CTX_SHIFT))) > > > > -#define SET_GLOBAL_REG(reg, base, val) writel((val), ((base) + > > (reg))) > > +/* > > + * The writes to

Re: [PATCH V5 6/7] iommu/msm: Use writel_relaxed and add a barrier

2016-05-20 Thread Arnd Bergmann
On Friday 20 May 2016 16:24:53 Sricharan R wrote: > While using the generic pagetable ops the tlb maintenance > operation gets completed in the sync callback. So use writel_relaxed > for all register access and add a mb() at appropriate places. > > Signed-off-by: Sricharan R > --- > drivers/iomm

RE: [RFC 0/9] IOMMU probe deferral support

2016-05-20 Thread Sricharan
Hi Robin/Laurent, >> -Original Message- >> From: linux-arm-kernel [mailto:linux-arm-kernel- >> boun...@lists.infradead.org] On Behalf Of Marek Szyprowski >> Sent: Thursday, May 12, 2016 6:23 PM >> To: Sricharan R ; will.dea...@arm.com; >> robin.mur...@arm.com; j...@8bytes.org; iommu@lists.

RE: [PATCH V4 6/7] iommu/msm: Use writel_relaxed and add a barrier

2016-05-20 Thread Sricharan
Hi Arnd, >> >>If you need the barrier after the write, it probably was already faulty >>before, because writel only implies a barrier before the store, not >>after. Of course all the barriers likely made the whole process so >>slow that you never hit that race in the end. > >ya, it could have work

[PATCH V5 7/7] iommu/msm: Remove driver BROKEN

2016-05-20 Thread Sricharan R
Now that the driver is DT adapted, bus_set_iommu gets called only when on compatible matching. So the driver should not break multiplatform builds now. So remove the BROKEN config. Signed-off-by: Sricharan R --- drivers/iommu/Kconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/iom

[PATCH V5 3/7] iommu/msm: Move the contents from msm_iommu_dev.c to msm_iommu.c

2016-05-20 Thread Sricharan R
There are only two functions left in msm_iommu_dev.c. Move it to msm_iommu.c and delete the file. Signed-off-by: Sricharan R --- drivers/iommu/Makefile| 2 +- drivers/iommu/msm_iommu.c | 182 drivers/iommu/msm_iommu_dev.c | 212 -

[PATCH V5 5/7] iommu/msm: use generic ARMV7S short descriptor pagetable ops

2016-05-20 Thread Sricharan R
This iommu uses the armv7 short descriptor format. So use the generic ARMV7S pagetable ops instead of rewriting the same stuff in the driver. Signed-off-by: Sricharan R --- drivers/iommu/Kconfig | 1 + drivers/iommu/msm_iommu.c | 400 -- 2 files

[PATCH V5 6/7] iommu/msm: Use writel_relaxed and add a barrier

2016-05-20 Thread Sricharan R
While using the generic pagetable ops the tlb maintenance operation gets completed in the sync callback. So use writel_relaxed for all register access and add a mb() at appropriate places. Signed-off-by: Sricharan R --- drivers/iommu/msm_iommu.c | 24 +++-- drivers/iommu/msm_iommu_h

[PATCH V5 0/7] iommu/msm: Add DT adaptation and generic bindings support

2016-05-20 Thread Sricharan R
The msm_iommu.c driver currently works based on platform data. A single master device can be connected to more than one iommu and multiple contexts in each of the iommu. This association between master and iommus was represented from platform data using parent/child devices. The master drivers were

[PATCH V5 2/7] documentation: iommu: Add bindings for msm, iommu-v0 ip

2016-05-20 Thread Sricharan R
The MSM IOMMU is an implementation compatible with the ARM VMSA short descriptor page tables. It provides address translation for bus masters outside of the CPU, each connected to the IOMMU through a port called micro-TLB. Adding the DT bindings for the same. Signed-off-by: Sricharan R --- .../d

[PATCH V5 1/7] iommu/msm: Add DT adaptation

2016-05-20 Thread Sricharan R
The driver currently works based on platform data. Remove this and add support for DT. A single master can have multiple ports connected to more than one iommu. master | | | ---

[PATCH V5 4/7] iommu/msm: Add support for generic master bindings

2016-05-20 Thread Sricharan R
This adds the xlate callback which gets invoked during device registration from DT. The master devices gets added through this. Signed-off-by: Sricharan R --- drivers/iommu/msm_iommu.c | 61 +-- 1 file changed, 59 insertions(+), 2 deletions(-) diff --