Hi Sricharan,
Thanks for the patchset,
On 20/05/16 11:54, Sricharan R wrote:
The msm_iommu.c driver currently works based on platform data.
A single master device can be connected to more than one iommu and multiple
contexts in each of the iommu. This association between master and iommus was
r
On 05/20/2016 04:24 PM, Sricharan R wrote:
The msm_iommu.c driver currently works based on platform data.
A single master device can be connected to more than one iommu and multiple
contexts in each of the iommu. This association between master and iommus was
represented from platform data usin
Hello,
On 2016-04-25 17:58, Sricharan R wrote:
Now that the device's iommu ops are configured at probe time,
the device has to be added to the iommu late.
Signed-off-by: Sricharan R
---
drivers/of/device.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/of/device.c b/driver
Hi Marek,
>On 2016-04-25 17:58, Sricharan R wrote:
>> Now that the device's iommu ops are configured at probe time,
>> the device has to be added to the iommu late.
>>
>> Signed-off-by: Sricharan R
>> ---
>> drivers/of/device.c | 4
>> 1 file changed, 4 insertions(+)
>>
>> diff --git a/dr
Am Montag, 23. Mai 2016, 09:37:15 schrieb Shunqian Zheng:
> From: Simon
generally a "firstname surename " is expected, so a first name is not
really enough.
>
> When rk_iommu_attach_device or rk_iommu_detach_device be called, the
> second parameter "dev" represent the device who own the iommu,
This patch reworks driver probe code to propagate error codes from
clk_get() operation. This will allow to properly handle deferred probe
in the future.
Signed-off-by: Marek Szyprowski
---
drivers/iommu/exynos-iommu.c | 56 +++-
1 file changed, 24 insertio
Hello,
This patch series improves clock management in Exynos IOMMU driver, so
the driver will be ready for potential deferred probe caused by
not-yet-available clocks. Such case doesn't happen with current kernel,
but it may happen with the planned rework on clocks and power domain
code.
Best reg
If SYSMMU controller is not active, there is no point in enabling master's
clock just for doing the the of internal state. This patch moves enabling
that clock to the block which actually does the register access.
Signed-off-by: Marek Szyprowski
---
drivers/iommu/exynos-iommu.c | 9 -
1
Make clock preparation together with clk_enable(). This way inactive
SYSMMU controllers will not keep clocks prepared all the time.
This change allows more fine graded power management in the future.
All the code assumes that clock management doesn't fail, so guard
clock_prepare_enable() it with BU
On 23/05/16 02:37, Shunqian Zheng wrote:
From: Simon
Signed-off-by: Simon
---
drivers/iommu/rockchip-iommu.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c
index 043d18c..1741b65 100644
--- a/drivers/iommu/rockchip-iom
Register iommu_ops at the end of successful probe instead of doing that
unconditionally. This makes Exynos IOMMU driver ready for deferred probe
caused by not-yet-available clocks.
Signed-off-by: Marek Szyprowski
---
I'm sorry for the confussing patch number. This patch got lost while
rebasing, b
On Mon, May 23, 2016 at 11:44:14AM +0100, Robin Murphy wrote:
> On 23/05/16 02:37, Shunqian Zheng wrote:
> >From: Simon
> >
> >Signed-off-by: Simon
> >---
> > drivers/iommu/rockchip-iommu.c | 4
> > 1 file changed, 4 insertions(+)
> >
> >diff --git a/drivers/iommu/rockchip-iommu.c b/drivers
On Thu, May 19, 2016 at 07:49:14PM +0800, honghui.zh...@mediatek.com wrote:
> From: Honghui Zhang
>
> This patch defines the local arbitor port IDs for mediatek SoC MT2701 and
> add descriptions of binding for mediatek generation one iommu and smi.
>
> Signed-off-by: Honghui Zhang
> ---
> .../
On 19/05/16 12:49, honghui.zh...@mediatek.com wrote:
From: Honghui Zhang
Mediatek SoC's M4U has two generations of HW architcture. Generation one
uses flat, one layer pagetable, and was shipped with ARM architecture, it
only supports 4K size page mapping. MT2701 SoC uses this generation one
m4u
On Fri, May 20, 2016 at 04:24:49PM +0530, Sricharan R wrote:
> The MSM IOMMU is an implementation compatible with the ARM VMSA short
> descriptor page tables. It provides address translation for bus masters
> outside
> of the CPU, each connected to the IOMMU through a port called micro-TLB.
> Addi
Catalin, Robin,
On 2016年05月23日 21:35, Catalin Marinas wrote:
On Mon, May 23, 2016 at 11:44:14AM +0100, Robin Murphy wrote:
On 23/05/16 02:37, Shunqian Zheng wrote:
From: Simon
Signed-off-by: Simon
---
drivers/iommu/rockchip-iommu.c | 4
1 file changed, 4 insertions(+)
diff --git a/
Some of the non-exported functions do not modify passed dma_attrs so the
pointer can point to const data.
Signed-off-by: Krzysztof Kozlowski
---
arch/arm/mm/dma-mapping.c | 26 ++
1 file changed, 14 insertions(+), 12 deletions(-)
diff --git a/arch/arm/mm/dma-mapping.c b/
Pointer to dma_attrs passed to all dma-mapping implementations can point
to const data. This brings some benefits:
- const-safeness,
- is a direct indication that ownership of memory is not transferred to
called functions so it can be safely allocated on the stack (which is
a pattern alread
Hi,
The patchset is divided into two parts:
1. (patch 1-3): Constify dma_attrs passed to some of functions. The
first patch is a dependency for all other. This is not intrusive.
2. patch 4: request for comments, constify dma_attrs everywhere (struct
dma_map_ops and implementations).
Cons
The dma_get_attr() does not modify passed dma_attrs so the pointer can
point to const data.
Signed-off-by: Krzysztof Kozlowski
---
include/linux/dma-attrs.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/include/linux/dma-attrs.h b/include/linux/dma-attrs.h
index 5246239a4
Some of the non-exported functions do not modify passed dma_attrs so the
pointer can point to const data.
Signed-off-by: Krzysztof Kozlowski
---
arch/arm64/mm/dma-mapping.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/mm/dma-mapping.c b/arch/arm64/mm/dma-m
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