Re: [PATCH V8 6/9] arm/dma-mapping: Implement DMA_ATTR_PRIVILEGED

On Mon, Jan 02, 2017 at 06:42:41PM +0530, Sricharan R wrote: > The newly added DMA_ATTR_PRIVILEGED is useful for creating mappings that > are only accessible to privileged DMA engines. Adding it to the > arm dma-mapping.c so that the ARM32 DMA IOMMU mapper can make use of it. > > Signed-off-by:

Re: [RFC 2/3] iommu/arm-smmu: Add qcom implementation

On Wed, Jan 4, 2017 at 9:31 AM, Rob Clark wrote: > On Wed, Jan 4, 2017 at 8:33 AM, Sricharan wrote: >> Hi, >> >>>-Original Message- >>>From: linux-arm-msm-ow...@vger.kernel.org >>>[mailto:linux-arm-msm-ow...@vger.kernel.org] On Behalf Of

Re: [PATCH v5 13/17] irqdomain: irq_domain_check_msi_remap

Hi Marc, On 04/01/2017 16:27, Marc Zyngier wrote: > On 04/01/17 14:11, Auger Eric wrote: >> Hi Marc, >> >> On 04/01/2017 14:46, Marc Zyngier wrote: >>> Hi Eric, >>> >>> On 04/01/17 13:32, Eric Auger wrote: This new function checks whether all platform and PCI MSI domains implement IRQ

Re: [PATCH v5 13/17] irqdomain: irq_domain_check_msi_remap

On 04/01/17 14:11, Auger Eric wrote: > Hi Marc, > > On 04/01/2017 14:46, Marc Zyngier wrote: >> Hi Eric, >> >> On 04/01/17 13:32, Eric Auger wrote: >>> This new function checks whether all platform and PCI >>> MSI domains implement IRQ remapping. This is useful to >>> understand whether VFIO

Re: [PATCH] iommu: Drop the of_iommu_{set/get}_ops() interface

On Tue, Jan 03, 2017 at 05:34:56PM +, Lorenzo Pieralisi wrote: > With the introduction of the new iommu_{register/get}_instance() > interface in commit e4f10ffe4c9b ("iommu: Make of_iommu_set/get_ops() DT > agnostic") (based on struct fwnode_handle as look-up token, so firmware > agnostic) to

Re: [PATCH] iommu: Drop the of_iommu_{set/get}_ops() interface

[+Yong Wu for mtk_iommu] On 03/01/17 17:34, Lorenzo Pieralisi wrote: > With the introduction of the new iommu_{register/get}_instance() > interface in commit e4f10ffe4c9b ("iommu: Make of_iommu_set/get_ops() DT > agnostic") (based on struct fwnode_handle as look-up token, so firmware > agnostic)

Re: [PATCH V6 2/7] perf/amd/iommu: Modify functions to query max banks and counters

On Fri, Dec 23, 2016 at 08:38:45PM +0700, Suravee Suthikulpanit wrote: > --- a/arch/x86/events/amd/iommu.h > +++ b/arch/x86/events/amd/iommu.h > @@ -24,15 +24,12 @@ > #define PC_MAX_SPEC_BNKS 64 > #define PC_MAX_SPEC_CNTRS16 > > -/* iommu pc reg masks*/

Re: possible dmar_init_reserved_ranges() error

On Tue, Dec 27, 2016 at 07:21:39PM -0800, Raj, Ashok wrote: > This sounds reasonable, if we can reserve from the host bridge apertures > it should take care of hot-plug cases as well, and should simply how the > reservation is made. Agreed, I have this on my todo list already since I converted

Re: [PATCH] iommu/iova: use rb_entry()

On Mon, Dec 19, 2016 at 10:46:58PM +0800, Geliang Tang wrote: > To make the code clearer, use rb_entry() instead of container_of() to > deal with rbtree. > > Signed-off-by: Geliang Tang > --- > drivers/iommu/iova.c | 23 +++ > 1 file changed, 11

Re: [RFC 2/3] iommu/arm-smmu: Add qcom implementation

On Wed, Jan 4, 2017 at 8:33 AM, Sricharan wrote: > Hi, > >>-Original Message- >>From: linux-arm-msm-ow...@vger.kernel.org >>[mailto:linux-arm-msm-ow...@vger.kernel.org] On Behalf Of Jordan Crouse >>Sent: Wednesday, January 04, 2017 3:59 AM >>To: Rob Clark

Re: [PATCH] iommu/amd: fix the left value check of cmd buffer

On Mon, Dec 12, 2016 at 07:28:26AM -0500, Huang Rui wrote: > The generic command buffer entry is 128 bits (16 bytes), so the offset > of tail and head pointer should be 16 bytes aligned and increased with > 0x10 per command. > > When cmd buf is full, head = (tail + 0x10) % CMD_BUFFER_SIZE. > >

Re: [PATCH v2] iommu/intel-iommu: fix pasid table size encoding

On Tue, Dec 06, 2016 at 10:14:23AM -0800, Jacob Pan wrote: > drivers/iommu/intel-iommu.c | 23 ++- > 1 file changed, 22 insertions(+), 1 deletion(-) Applied to the fixes branch, thanks. ___ iommu mailing list

Re: [PATCH v3] iommu/vt-d: Flush old iommu caches for kdump when the device gets context mapped

On Mon, Dec 05, 2016 at 08:09:07PM +0800, Xunlei Pang wrote: > v2->v3: > Flush context cache only and add Fixes-tag, according to Joerg's comments. > > drivers/iommu/intel-iommu.c | 19 +++ > 1 file changed, 19 insertions(+) Applied to the fixes branch, thanks.

Re: [PATCH v5 13/17] irqdomain: irq_domain_check_msi_remap

Hi Marc, On 04/01/2017 14:46, Marc Zyngier wrote: > Hi Eric, > > On 04/01/17 13:32, Eric Auger wrote: >> This new function checks whether all platform and PCI >> MSI domains implement IRQ remapping. This is useful to >> understand whether VFIO passthrough is safe with respect >> to interrupts.

Re: [PATCH v5 13/17] irqdomain: irq_domain_check_msi_remap

Hi Eric, On 04/01/17 13:32, Eric Auger wrote: > This new function checks whether all platform and PCI > MSI domains implement IRQ remapping. This is useful to > understand whether VFIO passthrough is safe with respect > to interrupts. > > On ARM typically an MSI controller can sit downstream >

[PATCH v5 16/17] vfio/type1: Check MSI remapping at irq domain level

In case the IOMMU does not bypass MSI transactions (typical case on ARM), we check all MSI controllers are IRQ remapping capable. If not the IRQ assignment may be unsafe. At this stage the arm-smmu-(v3) still advertise the IOMMU_CAP_INTR_REMAP capability at IOMMU level. This will be removed in

[PATCH v5 15/17] vfio/type1: Allow transparent MSI IOVA allocation

When attaching a group to the container, check the group's reserved regions and test whether the IOMMU translates MSI transactions. If yes, we initialize an IOVA allocator through the iommu_get_msi_cookie API. This will allow the MSI IOVAs to be transparently allocated on MSI controller's

[PATCH v5 17/17] iommu/arm-smmu: Do not advertise IOMMU_CAP_INTR_REMAP anymore

IOMMU_CAP_INTR_REMAP has been advertised in arm-smmu(-v3) although on ARM this property is not attached to the IOMMU but rather is implemented in the MSI controller (GICv3 ITS). Now vfio_iommu_type1 takes into account the MSI domain MSI remapping capability, let's correct this. Signed-off-by:

RE: [RFC 2/3] iommu/arm-smmu: Add qcom implementation

Hi, >-Original Message- >From: linux-arm-msm-ow...@vger.kernel.org >[mailto:linux-arm-msm-ow...@vger.kernel.org] On Behalf Of Jordan Crouse >Sent: Wednesday, January 04, 2017 3:59 AM >To: Rob Clark >Cc: Will Deacon ;

[PATCH v5 13/17] irqdomain: irq_domain_check_msi_remap

This new function checks whether all platform and PCI MSI domains implement IRQ remapping. This is useful to understand whether VFIO passthrough is safe with respect to interrupts. On ARM typically an MSI controller can sit downstream to the IOMMU without preventing VFIO passthrough. As such any

[PATCH v5 11/17] iommu/arm-smmu-v3: Implement reserved region get/put callbacks

iommu/arm-smmu: Implement reserved region get/put callbacks The get() populates the list with the MSI IOVA reserved window. At the moment an arbitray MSI IOVA window is set at 0x800 of size 1MB. This will allow to report those info in iommu-group sysfs. Signed-off-by: Eric Auger

[PATCH v5 09/17] iommu/amd: Declare MSI and HT regions as reserved IOVA regions

This patch registers the MSI and HT regions as non mappable reserved regions. They will be exposed in the iommu-group sysfs. For direct-mapped regions let's also use iommu_alloc_resv_region(). Signed-off-by: Eric Auger --- v5: creation --- drivers/iommu/amd_iommu.c |

[PATCH v5 10/17] iommu/arm-smmu: Implement reserved region get/put callbacks

The get() populates the list with the MSI IOVA reserved window. At the moment an arbitray MSI IOVA window is set at 0x800 of size 1MB. This will allow to report those info in iommu-group sysfs. Signed-off-by: Eric Auger --- v3 -> v4: - do not handle PCI host bridge

[PATCH v5 12/17] irqdomain: Add IRQ_DOMAIN_FLAG_MSI_REMAP value

This new enum value aims at indicating whether the irq domain implements MSI remapping. This property is useful to assess the IRQ assignment safety at VFIO level. Signed-off-by: Eric Auger --- --- include/linux/irqdomain.h | 3 +++ 1 file changed, 3 insertions(+) diff

[PATCH v5 08/17] iommu/vt-d: Implement reserved region get/put callbacks

This patch registers the [FEE0_h - FEF0_000h] 1MB MSI range as a reserved region. This will allow to report that range in the iommu-group sysfs. Signed-off-by: Eric Auger --- RFCv2 -> RFCv3: - use get/put_resv_region callbacks. RFC v1 -> RFC v2: - fix

[PATCH v5 07/17] iommu: Implement reserved_regions iommu-group sysfs file

A new iommu-group sysfs attribute file is introduced. It contains the list of reserved regions for the iommu-group. Each reserved region is described on a separate line: - first field is the start IOVA address, - second is the end IOVA address, Signed-off-by: Eric Auger

[PATCH v5 05/17] iommu: Only map direct mapped regions

As we introduced new reserved region types which do not require mapping, let's make sure we only map direct mapped regions. Signed-off-by: Eric Auger --- v3 -> v4: - use region's type and reword commit message and title --- drivers/iommu/iommu.c | 3 +++ 1 file changed,

[PATCH v5 04/17] iommu: iommu_alloc_resv_region

Introduce a new helper serving the purpose to allocate a reserved region. This will be used in iommu driver implementing reserved region callbacks. Signed-off-by: Eric Auger --- v3 -> v4: - add INIT_LIST_HEAD(>list) - use int for prot param and add int type param -

[PATCH v5 03/17] iommu: Add a new type field in iommu_resv_region

We introduce a new field to differentiate the reserved region types and specialize the apply_resv_region implementation. Legacy direct mapped regions have IOMMU_RESV_DIRECT type. We introduce 2 new reserved memory types: - IOMMU_RESV_MSI will characterize MSI regions - IOMMU_RESV_NOMAP

[PATCH v5 02/17] iommu: Rename iommu_dm_regions into iommu_resv_regions

We want to extend the callbacks used for dm regions and use them for reserved regions. Reserved regions can be - directly mapped regions - regions that cannot be iommu mapped (PCI host bridge windows, ...) - MSI regions (because they belong to another address space or because they are not

[PATCH v5 01/17] iommu/dma: Allow MSI-only cookies

IOMMU domain users such as VFIO face a similar problem to DMA API ops with regard to mapping MSI messages in systems where the MSI write is subject to IOMMU translation. With the relevant infrastructure now in place for managed DMA domains, it's actually really simple for other users to piggyback

[PATCH v5 00/17] KVM PCIe/MSI passthrough on ARM/ARM64 and IOVA reserved regions

Following LPC discussions, we now report reserved regions through iommu-group sysfs reserved_regions attribute file. Reserved regions are populated through the IOMMU get_resv_region callback (former get_dm_regions), now implemented by amd-iommu, intel-iommu and arm-smmu: - the intel-iommu reports

RE: [PATCH] iommu: Drop the of_iommu_{set/get}_ops() interface

Hi Lorenzo, >With the introduction of the new iommu_{register/get}_instance() >interface in commit e4f10ffe4c9b ("iommu: Make of_iommu_set/get_ops() DT >agnostic") (based on struct fwnode_handle as look-up token, so firmware >agnostic) to register IOMMU instances with the core IOMMU layer there