On Fri, Feb 03, 2017 at 04:10:30PM +0200, Laurent Pinchart wrote:
> Hi Rob,
>
> On Monday 29 Feb 2016 23:33:09 Magnus Damm wrote:
> > From: Magnus Damm
> >
> > Update the IPMMU DT binding documentation to include the r8a7795 compat
> > string as well as the
On Tue, Feb 07, 2017 at 02:40:36AM -0600, Suravee Suthikulpanit wrote:
> From: Suravee Suthikulpanit
>
> Add multi-IOMMU support for perf by exposing an AMD IOMMU PMU
> for each IOMMU found in the system via:
>
> /bus/event_source/devices/amd_iommu_x
>
> where
On Tue, Feb 07, 2017 at 02:40:34AM -0600, Suravee Suthikulpanit wrote:
> From: Suravee Suthikulpanit
>
> The current amd_iommu_pc_get_set_reg_val() cannot support multiple IOMMUs.
> So, modify it to allow callers to specify IOMMU. This prepares the driver
> for
On Tue, Feb 07, 2017 at 02:40:33AM -0600, Suravee Suthikulpanit wrote:
> Currently, amd_iommu_pc_get_max_[banks|counters]() use end-point
> device ID to locate an IOMMU and check the reported max banks/counters.
> The logic assumes that the IOMMU_BASE_DEVID belongs to the first IOMMU,
> and uses
On 08/02/17 13:52, Mark Rutland wrote:
> On Wed, Feb 08, 2017 at 07:15:37PM +0530, Sricharan wrote:
>>> Clocks are not architectural, so it only makes sense to associate them
>>> with an implementation-specific compatible string. There's also no
>>
>> ok, it for this the QCOM specific
Hi Joerg,
On 2017-02-08 14:57, Joerg Roedel wrote:
On Tue, Feb 07, 2017 at 01:36:15PM +0100, Marek Szyprowski wrote:
+ ret = iommu_device_sysfs_add(>iommu, >dev, NULL,
+"sysmmu.%pa", );
Can we stick to the common name across the /sysfs and use
Hi Marek,
On Tue, Feb 07, 2017 at 01:36:15PM +0100, Marek Szyprowski wrote:
> >+ret = iommu_device_sysfs_add(>iommu, >dev, NULL,
> >+ "sysmmu.%pa", );
>
> Can we stick to the common name across the /sysfs and use
> dev_name(data->sysmmu)
> or even
On Wed, Feb 08, 2017 at 07:15:37PM +0530, Sricharan wrote:
> >Clocks are not architectural, so it only makes sense to associate them
> >with an implementation-specific compatible string. There's also no
>
> ok, it for this the QCOM specific implementation binding is tried(going to).
>
>
Hi Robin,
> On Thu, Feb 02, 2017 at 10:40:18PM +0530, Sricharan R wrote:
>> +- clock-names:Should be a pair of "smmu_iface_clk" and
>> "smmu_bus_clk"
>> + required for smmu's register group access and
>> interface
>> + clk for the
On 08/02/17 12:30, Sricharan wrote:
> Hi Mark,
>
>> On Wed, Feb 08, 2017 at 04:23:17PM +0530, Sricharan wrote:
On Thu, Feb 02, 2017 at 10:40:18PM +0530, Sricharan R wrote:
> +- clock-names:Should be a pair of "smmu_iface_clk" and "smmu_bus_clk"
> + required for
Hi Mark,
>On Wed, Feb 08, 2017 at 04:23:17PM +0530, Sricharan wrote:
>> >On Thu, Feb 02, 2017 at 10:40:18PM +0530, Sricharan R wrote:
>> >> +- clock-names:Should be a pair of "smmu_iface_clk" and "smmu_bus_clk"
>> >> + required for smmu's register group access and interface
On Wed, Feb 08, 2017 at 04:23:17PM +0530, Sricharan wrote:
> >On Thu, Feb 02, 2017 at 10:40:18PM +0530, Sricharan R wrote:
> >> +- clock-names:Should be a pair of "smmu_iface_clk" and "smmu_bus_clk"
> >> + required for smmu's register group access and interface
> >> +
Hi Mark,
>
>On Thu, Feb 02, 2017 at 10:40:18PM +0530, Sricharan R wrote:
>> +- clock-names:Should be a pair of "smmu_iface_clk" and "smmu_bus_clk"
>> + required for smmu's register group access and interface
>> + clk for the smmu's underlying bus access.
>> +
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