Boris,
On 2/9/17 02:33, Borislav Petkov wrote:
On Tue, Feb 07, 2017 at 02:40:36AM -0600, Suravee Suthikulpanit wrote:
From: Suravee Suthikulpanit
[..]
+ perf_iommu->max_banks= amd_iommu_pc_get_max_banks(idx);
+ perf_iommu->max_counters = amd_iommu_pc_get_max_counters(idx);
On 2017-02-14 18:51, Alex Williamson wrote:
On Tue, 14 Feb 2017 16:25:22 -0500
Sinan Kaya wrote:
The ACS requirement has been obscured in the current code and is only
known by certain individuals who happen to read the code. Print out a
warning with ACS path failure when ACS requirement is not
On Tue, 14 Feb 2017 16:25:22 -0500
Sinan Kaya wrote:
> The ACS requirement has been obscured in the current code and is only
> known by certain individuals who happen to read the code. Print out a
> warning with ACS path failure when ACS requirement is not met.
>
> Signed-off-by: Sinan Kaya
> -
The ACS requirement has been obscured in the current code and is only
known by certain individuals who happen to read the code. Print out a
warning with ACS path failure when ACS requirement is not met.
Signed-off-by: Sinan Kaya
---
drivers/iommu/iommu.c | 3 +++
1 file changed, 3 insertions(+)
These QCOM root ports do provide ACS-like features to disable peer
transactions and validate bus numbers in requests, but do not provide an
actual PCIe ACS capability.
Hardware supports source validation but it will report the issue as
Completer Abort instead of ACS Violation.
Hardware doesn't su
On Tue, Feb 14, 2017 at 1:46 PM, Robin Murphy wrote:
> Hi Rob,
>
> On 10/02/17 18:41, Rob Clark wrote:
>> For devices with iommu(s) in secure mode, we cannot touch global
>> registers, and we have to live with the context -> sid mapping that
>> the secure world has set up for us.
>>
>> This enable
Hi Rob,
On 10/02/17 18:41, Rob Clark wrote:
> For devices with iommu(s) in secure mode, we cannot touch global
> registers, and we have to live with the context -> sid mapping that
> the secure world has set up for us.
>
> This enables, for example db410c (apq8016) devices to use the up-
> stream
On 2/14/2017 7:36 AM, Will Deacon wrote:
> On Mon, Feb 13, 2017 at 08:54:04PM -0500, Sinan Kaya wrote:
>> On 2/13/2017 8:46 PM, Alex Williamson wrote:
My first goal is to support virtual function passthrough for device's that
are directly
connected. This will be possible with the qu
On Mon, Feb 13, 2017 at 08:54:04PM -0500, Sinan Kaya wrote:
> On 2/13/2017 8:46 PM, Alex Williamson wrote:
> >> My first goal is to support virtual function passthrough for device's that
> >> are directly
> >> connected. This will be possible with the quirk I proposed and it will be
> >> the most
On Tue, Feb 07, 2017 at 08:57:52AM +0700, Suravee Suthikulpanit wrote:
> >But instead it looks like you get the counter form:
> >
> > #define _GET_CNTR(ev) ((u8)(ev->hw.extra_reg.reg))
> >
> >Which is absolutely insane.
> >
>
> So, the IOMMU counters are grouped into bank, and there could b
On 14/02/17 01:54, Sinan Kaya wrote:
> On 2/13/2017 8:46 PM, Alex Williamson wrote:
>>> My first goal is to support virtual function passthrough for device's that
>>> are directly
>>> connected. This will be possible with the quirk I proposed and it will be
>>> the most
>>> secure solution. It ca
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