On Mon, Mar 20, 2017 at 08:11:28PM +0100, Thierry Reding wrote:
> From: Thierry Reding
>
> Currently, building code which uses the API guarded by the IOMMU_IOVA
> will fail to link if IOMMU_IOVA is not enabled. Often this code will be
> using the API provided by the IOMMU_API
From: Thierry Reding
The linux/iommu.h and linux/iova.h headers belong to the IOMMU subsystem
but scripts/get_maintainers.pl currently fails to assign them because
they aren't listed in MAINTAINERS.
Signed-off-by: Thierry Reding
---
MAINTAINERS | 2 ++
From: Thierry Reding
Currently, building code which uses the API guarded by the IOMMU_IOVA
will fail to link if IOMMU_IOVA is not enabled. Often this code will be
using the API provided by the IOMMU_API Kconfig symbol, but support for
this can be optional, with code falling
On 20/03/17 08:57, Oza Oza wrote:
> + linux-pci
>
> Regards,
> Oza.
>
> -Original Message-
> From: Oza Pawandeep [mailto:oza@broadcom.com]
> Sent: Friday, March 17, 2017 11:41 AM
> To: Joerg Roedel; Robin Murphy
> Cc: iommu@lists.linux-foundation.org; linux-ker...@vger.kernel.org;
>
On Mon, Mar 20, 2017 at 10:21 AM, Sricharan R wrote:
> Hi Rob,
>
> sorry for the delayed response. Was not there mostly last week.
>
>
> On 3/13/2017 11:49 PM, Rob Clark wrote:
>>
>> On Mon, Mar 13, 2017 at 9:38 AM, wrote:
>>>
>>> Hi Rob,
>>>
Hi Rob,
On 3/17/2017 2:33 AM, Rob Herring wrote:
On Thu, Mar 09, 2017 at 09:05:45PM +0530, Sricharan R wrote:
The MMU400x/500 is the implementation of the SMMUv2
arch specification. It is split in to two blocks
TBU, TCU. TBU caches the page table, instantiated
for each master locally, clocked
Hi Rob,
On 3/17/2017 2:40 AM, Rob Herring wrote:
On Thu, Mar 09, 2017 at 09:05:46PM +0530, Sricharan R wrote:
The QCOM_SMMUV2 is an implementation of the arm,smmu-v2 architecture.
The qcom,smmu is instantiated for each of the multimedia cores (for eg)
Venus (video encoder/decoder), mdp
Hi Rob,
sorry for the delayed response. Was not there mostly last week.
On 3/13/2017 11:49 PM, Rob Clark wrote:
On Mon, Mar 13, 2017 at 9:38 AM, wrote:
Hi Rob,
[..]
+static int qcom_iommu_init_domain(struct iommu_domain *domain,
+
On 20.03.2017 10:17, Marek Szyprowski wrote:
> For some unknown reasons, in some cases, FLPD cache invalidation doesn't
> work properly with SYSMMU v5 controllers found in Exynos5433 SoCs. This
> can be observed by a firmware crash during initialization phase of MFC
> video decoder available in
Documentation specifies that SYSMMU should be in blocked state while
performing TLB/FLPD cache invalidation, so add needed calls to
sysmmu_block/unblock.
Fixes: 66a7ed84b345d ("iommu/exynos: Apply workaround of caching fault page
table entries")
CC: sta...@vger.kernel.org # v4.10+
Signed-off-by:
For some unknown reasons, in some cases, FLPD cache invalidation doesn't
work properly with SYSMMU v5 controllers found in Exynos5433 SoCs. This
can be observed by a firmware crash during initialization phase of MFC
video decoder available in the mentioned SoCs when IOMMU support is
enabled. To
+ linux-pci
Regards,
Oza.
-Original Message-
From: Oza Pawandeep [mailto:oza@broadcom.com]
Sent: Friday, March 17, 2017 11:41 AM
To: Joerg Roedel; Robin Murphy
Cc: iommu@lists.linux-foundation.org; linux-ker...@vger.kernel.org;
linux-arm-ker...@lists.infradead.org;
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