RE: [RFC PATCH] iommu/dma/pci: account pci host bridge dma_mask for IOVA allocation

Hi Robin, I have made 3 separate patches now, which gives clear idea about the changes. we can have discussion there. Regards, Oza. -Original Message- From: Robin Murphy [mailto:robin.mur...@arm.com] Sent: Monday, March 20, 2017 9:14 PM To: Oza Oza Cc: Joerg Roedel;

[RFC PATCH 1/3] of/pci: dma-ranges to account highest possible host bridge dma_mask

it is possible that PCI device supports 64-bit DMA addressing, and thus it's driver sets device's dma_mask to DMA_BIT_MASK(64), however PCI host bridge may have limitations on the inbound transaction addressing. As an example, consider NVME SSD device connected to iproc-PCIe controller.

[RFC PATCH 3/3] of: fix node traversing in of_dma_get_range

it jumps to the parent node without examining the child node. also with that, it throws "no dma-ranges found for node" for pci dma-ranges. this patch fixes device node traversing for dma-ranges. Reviewed-by: Anup Patel Signed-off-by: Oza Pawandeep

[RFC PATCH 2/3] iommu/dma: account pci host bridge dma_mask for IOVA allocation

it is possible that PCI device supports 64-bit DMA addressing, and thus it's driver sets device's dma_mask to DMA_BIT_MASK(64), however PCI host bridge may have limitations on the inbound transaction addressing. As an example, consider NVME SSD device connected to iproc-PCIe controller.

Re: [RFC PATCH 24/30] iommu: Specify PASID state when unbinding a task

On 24/03/17 11:00, Joerg Roedel wrote: > On Thu, Mar 23, 2017 at 05:03:46PM +, Jean-Philippe Brucker wrote: >> On 23/03/17 16:52, Joerg Roedel wrote: >>> Thanks for that, I have a closer look. Is that stopper packet visible to >>> software (e.g. is an entry created in the queue)? >> >> As far

Re: [PATCH V9 00/11] IOMMU probe deferral support

On 24/03/17 09:27, Shameerali Kolothum Thodi wrote: > Hi Sricharan, > >> -Original Message- >> From: Sricharan R [mailto:sricha...@codeaurora.org] >> Sent: Friday, March 24, 2017 7:10 AM >> To: Wangzhou (B); robin.mur...@arm.com; will.dea...@arm.com; >> j...@8bytes.org;

Re: [PATCH v12 09/10] perf/amd/iommu: Introduce amd_iommu-specific struct in struct hw_perf_event

On Wed, Mar 22, 2017 at 02:02:41AM -0500, Suravee Suthikulpanit wrote: > From: Suravee Suthikulpanit > > Current AMD IOMMU Perf PMU inappropriately uses hardware struct > inside the union inside the struct hw_perf_event, mainly the use of > extra_reg. > > Instead,

Re: [PATCH V9 00/11] IOMMU probe deferral support

On Fri, Mar 24, 2017 at 09:27:51AM +, Shameerali Kolothum Thodi wrote: [...] > @@ -107,7 +107,7 @@ int of_dma_configure(struct device *dev, struct > device_node *np) > ret = of_dma_get_range(np, _addr, , ); > if (ret < 0) { > dma_addr = offset = 0; > -

[PATCH] x86/pci-calgary: use setup_timer

Use setup_timer() instead of init_timer() to simplify the code. Signed-off-by: Geliang Tang --- arch/x86/kernel/pci-calgary_64.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/arch/x86/kernel/pci-calgary_64.c b/arch/x86/kernel/pci-calgary_64.c

[git pull] IOMMU Fixes for Linux v4.11-rc3

Hi Linus, The following changes since commit 97da3854c526d3a6ee05c849c96e48d21527606c: Linux 4.11-rc3 (2017-03-19 19:09:39 -0700) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu.git tags/iommu-fixes-v4.11-rc3 for you to fetch changes up to

Re: [RFC PATCH 24/30] iommu: Specify PASID state when unbinding a task

On Thu, Mar 23, 2017 at 05:03:46PM +, Jean-Philippe Brucker wrote: > On 23/03/17 16:52, Joerg Roedel wrote: > > Thanks for that, I have a closer look. Is that stopper packet visible to > > software (e.g. is an entry created in the queue)? > > As far as I understand, it should be added to the

RE: [PATCH V9 00/11] IOMMU probe deferral support

Hi Sricharan, > -Original Message- > From: Sricharan R [mailto:sricha...@codeaurora.org] > Sent: Friday, March 24, 2017 7:10 AM > To: Wangzhou (B); robin.mur...@arm.com; will.dea...@arm.com; > j...@8bytes.org; lorenzo.pieral...@arm.com; iommu@lists.linux- > foundation.org;

[PATCH] iommu/exynos: Use smarter TLB flush method for v5 SYSMMU

SYSMMU v5 has dedicated registers to perform TLB flush range operation, so use them instead of looping with FLUSH_ENTRY command. Signed-off-by: Marek Szyprowski --- drivers/iommu/exynos-iommu.c | 20 1 file changed, 16 insertions(+), 4 deletions(-)

[PATCH] iommu/exynos: Don't open-code loop unrolling

IOMMU domain allocation is not performance critical operation, so remove hand made optimisation of unrolled initialization loop and leave this to the compiler. Signed-off-by: Marek Szyprowski --- drivers/iommu/exynos-iommu.c | 12 ++-- 1 file changed, 2

RE: [RFC PATCH 29/30] vfio: Add support for Shared Virtual Memory

> -Original Message- > From: kvm-ow...@vger.kernel.org [mailto:kvm-ow...@vger.kernel.org] On Behalf > Of Jean-Philippe Brucker > Sent: Thursday, March 23, 2017 9:38 PM > To: Liu, Yi L ; Alex Williamson > > Cc: Shanker Donthineni

Re: [PATCH V9 00/11] IOMMU probe deferral support

Hi Zhou, On 3/24/2017 9:23 AM, Zhou Wang wrote: On 2017/3/10 3:00, Sricharan R wrote: This series calls the dma ops configuration for the devices at a generic place so that it works for all busses. The dma_configure_ops for a device is now called during the device_attach callback just before