On Wed, Jun 28, 2017 at 2:53 PM, Suravee Suthikulpanit
wrote:
>
>
> On 6/29/17 00:26, Steven Walter wrote:
>>>
>>> So, I'm trying to reproduce this issue on the Ryzen system w/ the
>>> following
>>> setup:
>>>
>>> * Host kernel v4.11 (with this patch
>>> https://lkml.org/lkml/2017/6/23/295)
>>>
From: Jérôme Glisse
(Andrew you already have v1 in your queue of patch 1, patch 2 is new,
i think you can drop it patch 1 v1 for v2, v2 is bit more conservative
and i fixed typos)
All this only affect user of invalidate_range callback (at this time
CAPI arch/powerpc/platforms/powernv/npu-dma.c
From: Jérôme Glisse
This is an optimization patch that only affect mmu_notifier users which
rely on the invalidate_range() callback. This patch avoids calling that
callback twice in a row from inside __mmu_notifier_invalidate_range_end
Existing pattern (before this patch):
mmu_notifier_inval
From: Jérôme Glisse
This patch only affects users of mmu_notifier->invalidate_range callback
which are device drivers related to ATS/PASID, CAPI, IOMMUv2, SVM ...
and it is an optimization for those users. Everyone else is unaffected
by it.
When clearing a pte/pmd we are given a choice to notify
Hi Robin,
> -Original Message-
> From: Will Deacon [mailto:will.dea...@arm.com]
> Sent: Friday, October 13, 2017 8:24 PM
> To: Shameerali Kolothum Thodi
> Cc: lorenzo.pieral...@arm.com; marc.zyng...@arm.com;
> sudeep.ho...@arm.com; robin.mur...@arm.com; j...@8bytes.org;
> bhelg...@google.
On Fri, Oct 13, 2017 at 08:05:21PM +0100, Will Deacon wrote:
> On Thu, Aug 31, 2017 at 02:44:24PM +0100, Robin Murphy wrote:
> > Since Nate reported a reasonable performance boost from the out-of-line
> > MSI polling in v1 [1], I've now implemented the equivalent for cons
> > polling as well - that
On 13/10/17 20:05, Will Deacon wrote:
> Hi Robin,
>
> On Thu, Aug 31, 2017 at 02:44:24PM +0100, Robin Murphy wrote:
>> Since Nate reported a reasonable performance boost from the out-of-line
>> MSI polling in v1 [1], I've now implemented the equivalent for cons
>> polling as well - that has been b
On 13/10/17 19:59, Will Deacon wrote:
> Hi Robin,
>
> Some of my comments on patch 3 are addressed here, but I'm really struggling
> to convince myself that this algorithm is correct. My preference would
> be to leave the code as it is for SMMUs that don't implement MSIs, but
> comments below anyw
Hi Robin,
On Tue, Jun 20, 2017 at 2:19 AM, Robin Murphy wrote:
> On 19/06/17 10:14, Magnus Damm wrote:
>> From: Magnus Damm
>>
>> Add root device handling to the IPMMU driver by allowing certain
>> DT compat strings to enable has_cache_leaf_nodes that in turn will
>> support both root devices wi
On Tue, Oct 03, 2017 at 12:49:51PM +0100, Robin Murphy wrote:
> Reviewed-by: Robin Murphy
Thanks Robin. I've heard very little from the arch maintainers,
but if people remain silent I will apply the whole series to the
dma-mapping tree in the next days.
__
From: Magnus Damm
Introduce a feature to allow opt-out of setting up
IMBUSCR. The default case is unchanged.
Signed-off-by: Magnus Damm
---
Changes since V4:
- Use leaf node mmu instead of root
Changes since V3:
- None
Changes since V2:
- None
Changes since V1:
- Updated the commit
From: Magnus Damm
Tie in r8a7795 features and update the IOMMU_OF_DECLARE
compat string to include the updated compat string.
Signed-off-by: Magnus Damm
---
Changes since V4:
- Got rid of root device availability check in ->xlate()
-> deferred probing is used to make sure the root is alwa
I am using 4.14-rc4 with a patch on top that includes
arch/arm/include/asm/dma-mapping.h in a module.
I have MMU enabled, so
select DMA_NOOP_OPS if !MMU
does nothing for me, and I get a compile error because dma_noop_ops is unknown.
Maybe I should include linux/dma-mapping.h?
Thanks for the quic
From: Magnus Damm
Introduce support for two bit SL0 bitfield in IMTTBCR
by using a separate feature flag.
Signed-off-by: Magnus Damm
---
Changes since V4:
- Use leaf node mmu instead of root
Changes since V3:
- None
Changes since V2:
- None
Changes since V1:
- None
drivers/iommu/i
+ Robin and Christoph
On 16/10/17 06:27, Marian Mihailescu wrote:
> I am using 4.14-rc4 with a patch on top that includes
> arch/arm/include/asm/dma-mapping.h in a module.
>
> I have MMU enabled, so
> select DMA_NOOP_OPS if !MMU
> does nothing for me, and I get a compile error because dma_noop_op
From: Magnus Damm
Write IMCTR both in the root device and the leaf node.
To allow access of IMCTR introduce the following function:
- ipmmu_ctx_write_all()
While at it also rename context functions:
- ipmmu_ctx_read() -> ipmmu_ctx_read_root()
- ipmmu_ctx_write() -> ipmmu_ctx_write_root()
Si
From: Magnus Damm
The r8a7795 IPMMU supports 40-bit bus mastering. Both
the coherent DMA mask and the streaming DMA mask are
set to unlock the 40-bit address space for coherent
allocations and streaming operations.
Signed-off-by: Magnus Damm
---
Changes since V4:
- None
Changes since V3:
From: Magnus Damm
Hook up IOMMU_OF_DECLARE() support in case CONFIG_IOMMU_DMA
is enabled. The only current supported case for 32-bit ARM
is disabled, however for 64-bit ARM usage of OF is required.
Signed-off-by: Magnus Damm
---
Changes since V4:
- Use ipmmu_is_root() instead of now removed
From: Magnus Damm
Add root device handling to the IPMMU driver by allowing certain
DT compat strings to enable has_cache_leaf_nodes that in turn will
support both root devices with interrupts and leaf devices that
face the actual IPMMU consumer devices.
Signed-off-by: Magnus Damm
---
Changes
From: Magnus Damm
Add support for up to 8 contexts. Each context is mapped to one
domain. One domain is assigned one or more slave devices. Contexts
are allocated dynamically and slave devices are grouped together
based on which IPMMU device they are connected to. This makes slave
devices tied to
From: Magnus Damm
Introduce struct ipmmu_features to track various hardware
and software implementation changes inside the driver for
different kinds of IPMMU hardware. Add use_ns_alias_offset
as a first example of a feature to control if the secure
register bank offset should be used or not.
Si
iommu/ipmmu-vmsa: r8a7795 support V5
[PATCH v5 01/09] iommu/ipmmu-vmsa: Introduce features, break out alias
[PATCH v5 02/09] iommu/ipmmu-vmsa: Add optional root device feature
[PATCH v5 03/09] iommu/ipmmu-vmsa: Enable multi context support
[PATCH v5 04/09] iommu/ipmmu-vmsa: Make use of IOMMU_OF_DE
On 13/10/17 19:32, Will Deacon wrote:
> Hi Robin,
>
> This mostly looks good. Just a few comments below.
>
> On Thu, Aug 31, 2017 at 02:44:27PM +0100, Robin Murphy wrote:
>> As an IRQ, the CMD_SYNC interrupt is not particularly useful, not least
>> because we often need to wait for sync completio
On 16/10/17 09:12, Vladimir Murzin wrote:
> + Robin and Christoph
>
> On 16/10/17 06:27, Marian Mihailescu wrote:
>> I am using 4.14-rc4 with a patch on top that includes
>> arch/arm/include/asm/dma-mapping.h in a module.
>>
>> I have MMU enabled, so
>> select DMA_NOOP_OPS if !MMU
>> does nothing
On 13/10/17 20:10, Rob Herring wrote:
> On Fri, Oct 06, 2017 at 02:31:39PM +0100, Jean-Philippe Brucker wrote:
>> On ARM systems, some platform devices behind an IOMMU may support stall
>> and PASID features. Stall is the ability to recover from page faults and
>> PASID offers multiple process addr
25 matches
Mail list logo
