Hi Linus,
please pull these dma-mapping updates:
The following changes since commit 33d930e59a98fa10a0db9f56c7fa2f21a4aef9b9:
Linux 4.14-rc5 (2017-10-15 21:01:12 -0400)
are available in the git repository at:
git://git.infradead.org/users/hch/dma-mapping.git tags/dma-mapping-4.15
for
Re-spinn of "[PATCH] sh: migor: Reserve memory block for CEU" with additional
patch on top to post-pone page_to_pfn() mapping during mmap() on DMA memory.
Laurent is probably working on a proper fix, so I'm just copying the iommu list
here to make them aware of the problem on SH4 architecture,
A memory region for CEU (Capture Engine Unit) video buffers has to be
reserved during initialization.
Originally, it was allocated through DMA API helpers and stored in the
second IORESOURCE_MEM entry, to be later remapped by the CEU driver with
a call to 'dma_declare_coherent_memory()'
As Linux
On SH4 architecture, with SPARSEMEM memory model, translating page to
pfn hangs the CPU. Post-pone translation to pfn after
dma_mmap_from_dev_coherent() function call as it succeeds and make page
translation not necessary.
This patch was suggested by Laurent Pinchart and he's working to submit
a
Hi,
On Mon, Aug 7, 2017 at 5:59 PM, Rob Clark wrote:
> On Mon, Aug 7, 2017 at 4:27 AM, Vivek Gautam
> wrote:
>> On Thu, Jul 13, 2017 at 5:20 PM, Rob Clark wrote:
>>> On Thu, Jul 13, 2017 at 1:35 AM, Sricharan R
dma-coherent uses bitmap API which internally consider align based on the
requested size. Depending on some usage pattern, using align, I think, may
be good for fast search and anti-fragmentation. But with the align, an
allocation may be failed.
This is a example, total size is 30MB, only few
Hi Simon,
On Fri, Nov 10, 2017 at 1:15 PM, Simon Horman
wrote:
> Update the IPMMU DT binding documentation to include the
> r8a77970 (R-Car V3M) and r8a77995 (R-Car D3) compat strings.
>
> Based on work for r8a7796 by Magnus Damm.
>
> Signed-off-by: Simon Horman
Hi Jaewon,
On 2017-11-14 09:42, Jaewon Kim wrote:
dma-coherent uses bitmap API which internally consider align based on the
requested size. Depending on some usage pattern, using align, I think, may
be good for fast search and anti-fragmentation. But with the align, an
allocation may be failed.
From: Magnus Damm
Support the r8a7796 IPMMU by sharing feature flags between
r8a7795 and r8a7796. Also update IOMMU_OF_DECLARE to hook
up the updated compat string.
Signed-off-by: Magnus Damm
Reviewed-by: Geert Uytterhoeven
From: Magnus Damm
Bump up the maximum numbers of micro-TLBS to 48.
Each IPMMU device instance get micro-TLB assignment via
the "iommus" property in DT. Older SoCs tend to use a
maximum number of 32 micro-TLBs per IPMMU instance however
newer SoCs such as r8a7796 make
This series adds r8a7796 (R-Car M3-W), r8a77970 (R-Car V3M) and
r8a77995 (R-Car D3) support to the IPMMU driver.
The maximum number of micro-TLBs are increased and the driver is adjusted
to match on the new DT bindings posted separately.
Changes since V4:
- Marked as RFC as I believe more
Support the r8a77970 (R-Car V3M) and r8a77995 (R-Car D3) IPMMUs by sharing
feature flags with r8a7795 (R-Car H3) and r8a7796 (R-Car M3-W). Also update
IOMMU_OF_DECLARE to hook up the compat strings.
Based on work for the r8a7796 by Magnus Damm
Signed-off-by: Simon Horman
12 matches
Mail list logo