On Mon, 20 Nov 2017 14:25:14 +
Liviu Dudau wrote:
> On Fri, Oct 13, 2017 at 04:48:45PM +0100, Robin Murphy wrote:
> > Hi Joerg,
>
> Hi,
>
> >
> > On 20/09/17 15:13, Liviu Dudau wrote:
> > > If the IPMMU driver is compiled in the kernel it will replace the
> > > platform bus IOMMU ops o
On Mon, 20 Nov 2017 14:20:31 +
"Lukoshkov, Maksim" wrote:
> On 11/17/2017 18:55, Jacob Pan wrote:
> > +void qi_flush_dev_iotlb(struct intel_iommu *iommu, u16 sid, u16
> > pfsid,
> > + u16 qdep, u64 addr, unsigned mask)
> > +{
> > + struct qi_desc desc;
> > +
> > + pr_deb
Hi Will,
On 10/14/2017 12:38 AM, Will Deacon wrote:
On Wed, Sep 06, 2017 at 11:07:35AM +0530, Vivek Gautam wrote:
We don't want to touch the TLB when smmu is suspended, so
defer the TLB maintenance until smmu is resumed.
On resume, we issue arm_smmu_device_reset() to restore the
configuration
On 20/11/17 16:26, Konrad Rzeszutek Wilk wrote:
On Mon, Nov 20, 2017 at 08:17:14AM +, Eric Yang wrote:
Hi all,
Hi!
During debug a device only support 32bits DMA(Qualcomm Atheros AP) in our LS1043A 64bits ARM SOC, we
found that the invoke of dma_unmap_single --> swiotlb_tbl_unmap_singl
On Mon, Nov 20, 2017 at 08:17:14AM +, Eric Yang wrote:
> Hi all,
Hi!
>
> During debug a device only support 32bits DMA(Qualcomm Atheros AP) in our
> LS1043A 64bits ARM SOC, we found that the invoke of dma_unmap_single -->
> swiotlb_tbl_unmap_single will unmap the passed "size" anyway eve
On Fri, Oct 13, 2017 at 04:48:45PM +0100, Robin Murphy wrote:
> Hi Joerg,
Hi,
>
> On 20/09/17 15:13, Liviu Dudau wrote:
> > If the IPMMU driver is compiled in the kernel it will replace the
> > platform bus IOMMU ops on running the ipmmu_init() function, regardless
> > if there is any IPMMU hard
On 11/17/2017 18:55, Jacob Pan wrote:
+void qi_flush_dev_iotlb(struct intel_iommu *iommu, u16 sid, u16 pfsid,
+ u16 qdep, u64 addr, unsigned mask)
+{
+ struct qi_desc desc;
+
+ pr_debug_ratelimited("%s: sid %d, pfsid %d, qdep %d, addr %llx, mask
%d\n",
+
