[PATCH 1/1] iommu/arm-smmu: Add support for qcom,smmu-500 variant

Qualcomm's arm-smmu 500 implementation supports runtime pm so enable the same. Signed-off-by: Vivek Gautam --- Based on iommu/arm-smmu pm runtime support series [1]: [PATCH v8 0/5] iommu/arm-smmu: Add runtime pm/sleep support Tested on sdm845 with necessary

Re: [PATCH v7 13/14] iommu/rockchip: Add runtime PM support

On Tue, Mar 6, 2018 at 7:07 PM, Tomasz Figa wrote: > Hi Jeffy, > > It looks like I missed some details of how runtime PM enable works > before, so we might be able to simplify things. Sorry for not getting > things right earlier. > > On Tue, Mar 6, 2018 at 12:27 PM, Jeffy Chen

Re: [PATCH v7 13/14] iommu/rockchip: Add runtime PM support

Hi Tomasz, Thanks for your reply. On 03/06/2018 06:07 PM, Tomasz Figa wrote: Hi Jeffy, It looks like I missed some details of how runtime PM enable works before, so we might be able to simplify things. Sorry for not getting things right earlier hmm, right, the enable state should be the

[PATCH] iommu/vt-d: fix usage of force parameter in intel_ir_reconfigure_irte()

It was noticed that the IRTE configured for guest OS kernel was over-written while the guest was running. As a result, vt-d Posted Interrupts configured for the guest are not being delivered directly, and instead bounces off the host. Every interrupt delivery takes a VM Exit. It was noticed that

RE: [PATCH 1/3] dt-bindings: iommu: ipmmu-vmsa: Add device tree support for r8a774[35]

Dear All, I am very sorry to bother you, do you know who is supposed to take this patch? Thanks, Fab > -Original Message- > From: Biju Das [mailto:biju@bp.renesas.com] > Sent: 24 January 2018 15:42 > To: Joerg Roedel ; Laurent Pinchart >

Re: [PATCH v2 2/4] iommu/io-pgtable-arm: Support 52-bit physical address

Hey Robin, On Tue, Feb 27, 2018 at 01:49:14PM +, Robin Murphy wrote: > On 26/02/18 18:05, Will Deacon wrote: > >On Thu, Dec 14, 2017 at 04:58:51PM +, Robin Murphy wrote: > >>Bring io-pgtable-arm in line with the ARMv8.2-LPA feature allowing > >>52-bit physical addresses when using the

Re: [PATCH 1/3] dt-bindings: iommu: ipmmu-vmsa: Add device tree support for r8a774[35]

Hi Fabrizio, On Tue, Mar 6, 2018 at 5:55 PM, Fabrizio Castro wrote: > I am very sorry to bother you, do you know who is supposed to take this patch? Jörg is the IOMMU maintainer, so I assume he's the one. >> -Original Message- >> From: Biju Das

Re: [PATCH v2 1/4] iommu/arm-smmu-v3: Clean up address masking

Hi Robin, On Tue, Feb 27, 2018 at 01:28:31PM +, Robin Murphy wrote: > On 26/02/18 18:04, Will Deacon wrote: > >On Thu, Dec 14, 2017 at 04:58:50PM +, Robin Murphy wrote: > >>Before trying to add the SMMUv3.1 support for 52-bit addresses, make > >>things bearable by cleaning up the various

Re: [PATCH 07/37] iommu: Add a page fault handler

On 2018-03-06 05:46, Jean-Philippe Brucker wrote: On 05/03/18 21:53, Sinan Kaya wrote: On 2/12/2018 1:33 PM, Jean-Philippe Brucker wrote: +static struct workqueue_struct *iommu_fault_queue; Is there anyway we can make this fault queue per struct device? Since this is common code, I think it

Re: [RFC 3/5] dt-bindings: arm-smmu: Add reserved-msi-region

On 06/03/18 04:59, Jitendra Bhivare wrote: iPROC SoC has a special device window to treat GICv3 ITS MSI. Ugh, really? After preferably printing out 100 copies of the SBSA, binding them all together and dropping the lot onto the hardware designers from a great height, could you clarify what

Re: [RFC 2/5] dt-bindings: brcm: Add reserved-dma-region for iPROC

On 06/03/18 04:59, Jitendra Bhivare wrote: With SoC wide DMA mask of 40-bit, the mappings for entire IOVA space can't be specified in the PAXBv2 PCIe RC of SoC. The holes in IOVA space needs to be reserved to prevent any IOVA allocations in those spaces. Can you clarify why? If this is the PCI

Re: [RFC 1/5] dt-bindings: iommu: Add reserved-dma-region for IOMMU device

On 06/03/18 04:59, Jitendra Bhivare wrote: Certain regions in IO virtual address space may need to be reserved to be not used for devices configured behind IOMMU. Add documentation of the property to allow such regions to be specified in DT to be reserved using IOMMU_RESV_RESERVED type. That

Re: [PATCH 07/37] iommu: Add a page fault handler

On 05/03/18 21:53, Sinan Kaya wrote: > On 2/12/2018 1:33 PM, Jean-Philippe Brucker wrote: >> +static struct workqueue_struct *iommu_fault_queue; > > Is there anyway we can make this fault queue per struct device? > Since this is common code, I think it needs some care. I don't think it's better,

Re: [PATCH 03/37] iommu/sva: Manage process address spaces

On 05/03/18 15:28, Sinan Kaya wrote: > On 2/12/2018 1:33 PM, Jean-Philippe Brucker wrote: >> +static void io_mm_free(struct io_mm *io_mm) >> +{ >> +struct mm_struct *mm; >> +void (*release)(struct io_mm *); >> + >> +release = io_mm->release; >> +mm = io_mm->mm; >> + >> +

Re: [PATCH 07/37] iommu: Add a page fault handler

On 05/03/18 21:44, Sinan Kaya wrote: > On 2/12/2018 1:33 PM, Jean-Philippe Brucker wrote: >> +static int iommu_queue_fault(struct iommu_domain *domain, struct device >> *dev, >> + struct iommu_fault_event *evt) >> +{ >> +struct iommu_fault_group *group; >> +struct

Re: [PATCH v7 13/14] iommu/rockchip: Add runtime PM support

Hi Jeffy, It looks like I missed some details of how runtime PM enable works before, so we might be able to simplify things. Sorry for not getting things right earlier. On Tue, Mar 6, 2018 at 12:27 PM, Jeffy Chen wrote: > When the power domain is powered off, the

[RFC 5/5] iommu/arm-smmu: Allow direct mapping for MSI region

Current ARM SMMU virtualizes MSI addresses to IOVA space. In iProc SoCs, MSI needs to be steered. Allow reserving MSI address range using DT node entry as direct region. Signed-off-by: Jitendra Bhivare --- drivers/iommu/arm-smmu.c | 14 +- 1 file

[RFC 0/5] DT property to reserve IOMMU regions

ARM SoCs need a way to reserve IOMMU regions. Some address ranges used by devices sitting behind IOMMU are treated specially. To prevent these ranges from getting mapped in IOVA space, use the existing framework and code to reserve the ranges using DT properties. This patch set is created

[RFC 2/5] dt-bindings: brcm: Add reserved-dma-region for iPROC

With SoC wide DMA mask of 40-bit, the mappings for entire IOVA space can't be specified in the PAXBv2 PCIe RC of SoC. The holes in IOVA space needs to be reserved to prevent any IOVA allocations in those spaces. reserved-dma-region property is added to specify the ranges which should never be

[RFC 4/5] iommu/of: Reserve IOMMU DMA regions using DT

iPROC SoC provides restricted windows to access sparsed memory as per ARM memory map to the devices sitting behind IOMMU. The windows cover enough DDR space but not the entire 40-bit 1TB space used by IOMMU code as per the DMA mask set. Current IOMMU code does not provide a hook to reserve these

[RFC 3/5] dt-bindings: arm-smmu: Add reserved-msi-region

iPROC SoC has a special device window to treat GICv3 ITS MSI. Current code maps MSI to IOVA space. Add SMMU node property to use direct mappings for MSI region. This property is read and reserved when arm_smmu_get_resv_regions gets called. Signed-off-by: Jitendra Bhivare

[RFC 1/5] dt-bindings: iommu: Add reserved-dma-region for IOMMU device

Certain regions in IO virtual address space may need to be reserved to be not used for devices configured behind IOMMU. Add documentation of the property to allow such regions to be specified in DT to be reserved using IOMMU_RESV_RESERVED type. Reviewed-by: Ray Jui