Re: [PATCH v2 1/1] iommu/arm-smmu-v3: eliminate a potential memory corruption on Hi16xx soc

2018-10-29 Thread Leizhen (ThunderTown)
On 2018/10/30 1:59, Will Deacon wrote: > On Sat, Oct 20, 2018 at 03:36:54PM +0800, Zhen Lei wrote: >> The standard GITS_TRANSLATER register in ITS is only 4 bytes, but >> Hisilicon expands the next 4 bytes to carry some IMPDEF information. That >> means, total 8 bytes data will be written to MSI

Re: [PATCH] iommu: arm-smmu: Set SCTLR.HUPCF bit

2018-10-29 Thread Will Deacon
On Thu, Sep 27, 2018 at 06:46:07PM -0400, Rob Clark wrote: > We seem to need to set either this or CFCFG (stall), otherwise gpu > faults trigger problems with other in-flight transactions from the > GPU causing CP errors, etc. > > In the ARM SMMU spec, the 'Hit under previous context fault' bit is

Re: [PATCH v2 1/1] iommu/arm-smmu-v3: eliminate a potential memory corruption on Hi16xx soc

2018-10-29 Thread Will Deacon
On Sat, Oct 20, 2018 at 03:36:54PM +0800, Zhen Lei wrote: > The standard GITS_TRANSLATER register in ITS is only 4 bytes, but > Hisilicon expands the next 4 bytes to carry some IMPDEF information. That > means, total 8 bytes data will be written to MSIAddress each time. > > MSIAddr: |4bytes---