Hi Jacob,
On 12/15/18 1:30 AM, Jacob Pan wrote:
> On Wed, 12 Dec 2018 09:21:43 +0100
> Auger Eric wrote:
>
>> Hi Jacob,
>>
>> On 9/21/18 12:06 AM, Jacob Pan wrote:
>>> On Tue, 18 Sep 2018 16:24:51 +0200
>>> Eric Auger wrote:
>>>
From: Jacob Pan
Device faults detected by IOMMU
On Wed, Dec 12, 2018 at 11:38:43PM +0300, Dmitry Osipenko wrote:
> Dmitry Osipenko (24):
> iommu/tegra: gart: Remove pr_fmt and clean up includes
> iommu/tegra: gart: Clean up driver probe errors handling
> iommu/tegra: gart: Ignore devices without IOMMU phandle in DT
> iommu: Introduce iot
On Thu, Dec 13, 2018 at 10:45:24AM +, Will Deacon wrote:
> Joerg -- please can you take this on top of the pull request I sent already?
> Vivek included it as part of a separate series which I thought was going
> via arm-soc, but actually it needs to go with the other arm-smmu patches
> in orde
On 2018/12/11 20:19, Joerg Roedel wrote:
> From: Joerg Roedel
>
> Use the new helpers dev_iommu_fwspec_get()/set() to access
> the dev->iommu_fwspec pointer. This makes it easier to move
> that pointer later into another struct.
>
> Cc: Lorenzo Pieralisi
> Signed-off-by: Joerg Roedel
> ---
>
On Thu, Dec 13, 2018 at 05:19:48PM +0800, Yong Wu wrote:
> This reverts commit 82db33dc5e49fb625262d81125625d07a0d6184e.
>
> After the commit 29859aeb8a6e ("iommu/io-pgtable-arm-v7s: Abort
> allocation when table address overflows the PTE"), v7s will return fail
> if the page table allocation isn'
On 2018/12/11 21:43, Joerg Roedel wrote:
> From: Joerg Roedel
>
> Replace the iommu-check with a proper and readable function
> call.
>
> Cc: Lorenzo Pieralisi
> Acked-by: Robin Murphy
> Signed-off-by: Joerg Roedel
Acked-by: Hanjun Guo
Thanks
Hanjun
___
On Thu, Dec 13, 2018 at 08:19:28PM +, Fabrizio Castro wrote:
> Document RZ/G2E (R8A774C0) SoC bindings.
>
> Signed-off-by: Fabrizio Castro
> ---
> Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.txt | 1 +
> 1 file changed, 1 insertion(+)
Applied, thanks.
On Thu, Dec 13, 2018 at 08:22:44PM +, Fabrizio Castro wrote:
> Support RZ/G2E (a.k.a. R8A774C0) IPMMU.
>
> Signed-off-by: Fabrizio Castro
> ---
> drivers/iommu/ipmmu-vmsa.c | 5 +
> 1 file changed, 5 insertions(+)
Applied, thanks.
___
iommu ma
On Mon, Dec 17, 2018 at 11:41:10AM +0530, Vinod Koul wrote:
> On 11-12-18, 14:43, Joerg Roedel wrote:
> > From: Joerg Roedel
> >
> > Some places in the kernel check the iommu_group pointer in
> > 'struct device' in order to find ot whether a device is
>^^
> Typ
On 2018/12/11 23:05, Joerg Roedel wrote:
> From: Joerg Roedel
>
> Make sure to invoke this call-back through the proper
> function of the IOMMU-API.
>
> Signed-off-by: Joerg Roedel
> ---
> drivers/acpi/arm64/iort.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
Robin and Lorenzo
On 11.12.2018 15:43, Joerg Roedel wrote:
From: Joerg Roedel
Replace the dev->iommu_group check with a proper function
call that better reprensents its purpose.
Cc: Mathias Nyman
Acked-by: Robin Murphy
Signed-off-by: Joerg Roedel
---
drivers/usb/host/xhci.c | 2 +-
1 file changed, 1 inser
On Sat, Dec 15, 2018 at 12:14:29AM +1000, Greg Ungerer wrote:
> Yep, that is right. Certainly the MMU case is broken. Some noMMU cases work
> by virtue of the SoC only having an instruction cache (the older V2 cores).
Is there a good an easy case to detect if a core has a cache? Either
runtime or
On 17.12.2018 12:14, Joerg Roedel wrote:
> On Wed, Dec 12, 2018 at 11:38:43PM +0300, Dmitry Osipenko wrote:
>> Dmitry Osipenko (24):
>> iommu/tegra: gart: Remove pr_fmt and clean up includes
>> iommu/tegra: gart: Clean up driver probe errors handling
>> iommu/tegra: gart: Ignore devices witho
Hi Johan,
Am Montag, 17. Dezember 2018, 15:00:55 CET schrieb Johan Jonker:
> Thanks Tomasz for adding all the mailing lists.
> I prefer to ask first if a qos_hdmi exists before sending it in for
> public review.
>
> All the clocks in the pmu node seem to have a "quality-of-service" (QoS)
> block.
The dma_direct_supported() function intends to check the DMA mask against
specific values. However, the phys_to_dma() function includes the SME
encryption mask, which defeats the intended purpose of the check. This
results in drivers that support less than 48-bit DMA (SME encryption mask
is bit 47)
On 12/16/2018 05:41 PM, Tom Lendacky wrote:
> On 12/15/2018 04:55 AM, Christoph Hellwig wrote:
>> The mail seems to be so oddly encoded so that git-am fails on it. Can
>> you resend as plain text?
>
> Hmmm... not sure what happened with that, but yeah, looking at the message
> source shows someth
Hi all,
Thanks Tomasz for adding all the mailing lists.
I prefer to ask first if a qos_hdmi exists before sending it in for
public review.
All the clocks in the pmu node seem to have a "quality-of-service" (QoS)
block.
So I added one for hdmi too with the question if it exists and which
address i
Thanks,
applied to the dma-mapping for-linus tree.
___
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
Previouly drivers have their own way of mapping range of
kernel pages/memory into user vma and this was done by
invoking vm_insert_page() within a loop.
As this pattern is common across different drivers, it can
be generalized by creating a new function and use it across
the drivers.
vm_insert_ra
Previouly drivers have their own way of mapping range of
kernel pages/memory into user vma and this was done by
invoking vm_insert_page() within a loop.
As this pattern is common across different drivers, it can
be generalized by creating a new function and use it across
the drivers.
vm_insert_ra
Convert to use vm_insert_range() to map range of kernel
memory to user vma.
Signed-off-by: Souptick Joarder
Reviewed-by: Matthew Wilcox
---
drivers/iommu/dma-iommu.c | 13 +++--
1 file changed, 3 insertions(+), 10 deletions(-)
diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-
21 matches
Mail list logo
