On Thu, Sep 12, 2019 at 2:41 AM Frederic Chen
wrote:
>
> Hi Tomasz,
>
> I appreciate your helpful comments.
>
>
> On Tue, 2019-09-10 at 13:04 +0900, Tomasz Figa wrote:
> > Hi Frederic,
> >
> > On Tue, Sep 10, 2019 at 4:23 AM wrote:
> > >
> > > From: Frederic Chen
> > >
> > > This patch adds the
Hi Tomasz,
I appreciate your helpful comments.
On Tue, 2019-09-10 at 13:04 +0900, Tomasz Figa wrote:
> Hi Frederic,
>
> On Tue, Sep 10, 2019 at 4:23 AM wrote:
> >
> > From: Frederic Chen
> >
> > This patch adds the driver of Digital Image Processing (DIP)
> > unit in Mediatek ISP system, prov
On 2019-09-11 5:20 pm, Will Deacon wrote:
On Wed, Sep 11, 2019 at 06:19:04PM +0200, Neil Armstrong wrote:
On 11/09/2019 16:42, Robin Murphy wrote:
Here's the eagerly-awaited fix to unblock T720/T820, plus a couple of
other bits that I've collected so far. I'm not considering this as
5.3 fixes m
On Wed, Sep 11, 2019 at 06:19:04PM +0200, Neil Armstrong wrote:
> On 11/09/2019 16:42, Robin Murphy wrote:
> > Here's the eagerly-awaited fix to unblock T720/T820, plus a couple of
> > other bits that I've collected so far. I'm not considering this as
> > 5.3 fixes material, but it would be nice if
Hi,
On 11/09/2019 16:42, Robin Murphy wrote:
> Hi all,
>
> Here's the eagerly-awaited fix to unblock T720/T820, plus a couple of
> other bits that I've collected so far. I'm not considering this as
> 5.3 fixes material, but it would be nice if there's any chance still
> to sneak it into 5.4.
>
>
Midgard GPUs have ACE-Lite master interfaces which allows systems to
integrate them in an I/O-coherent manner. It seems that from the GPU's
viewpoint, the rest of the system is its outer shareable domain, and it
will only emit snoop signals for outer shareable accesses. As such,
setting the TTBR_SH
Whilst Midgard's MEMATTR follows a similar principle to the VMSA MAIR,
the actual attribute values differ, so although it currently appears to
work to some degree, we probably shouldn't be using our standard stage 1
MAIR for that. Instead, generate a reasonable MEMATTR with attribute
values borrowe
Hi all,
Here's the eagerly-awaited fix to unblock T720/T820, plus a couple of
other bits that I've collected so far. I'm not considering this as
5.3 fixes material, but it would be nice if there's any chance still
to sneak it into 5.4.
Robin.
Robin Murphy (3):
iommu/io-pgtable-arm: Correct Ma
In principle, Midgard GPUs supporting smaller VA sizes should only
require 3-level pagetables, since the address bits resolved at level 0
(47:40) will never change. However, the kbase driver does not appear to
have any notion of a variable start level, and empirically T720 and T820
rapidly blow up
Hi Tomasz,
On Wed, Sep 11, 2019 at 07:12:02PM +0900, Tomasz Figa wrote:
> Hi Sakari,
>
> On Tue, Sep 10, 2019 at 10:05 PM wrote:
> >
> > From: Dongchun Zhu
> >
> > This patch mainly adds two more sensor modes for OV8856 CMOS image sensor.
> > That is, the resolution of 1632*1224 and 3264*2448,
Hi Filippo,
On Tue, Sep 10, 2019 at 07:49:20PM +0200, Filippo Sironi wrote:
> This patch series introduce patches to take the domain lock whenever we call
> functions that end up calling __domain_flush_pages. Holding the domain lock
> is
> necessary since __domain_flush_pages traverses the devic
Applied to the dma-mapping tree.
On Tue, Sep 10, 2019 at 05:30:09PM +, Mehta, Sohil wrote:
> On Tue, 2019-09-10 at 10:08 +0200, Joerg Roedel wrote:
> > > + "Unknown", "Unknown", "Unknown", "Unknown", "Unknown",
> > "Unknown", "Unknown", /* 0x49-0x4F */
> >
> > Maybe add the number (0x49-0x4f) to the respecting "Unknown" f
On Wed, Sep 11, 2019 at 02:16:07PM +0800, Lu Baolu wrote:
> How about this change?
>
> diff --git a/kernel/dma/swiotlb.c b/kernel/dma/swiotlb.c
> index 89066efa3840..22a7848caca3 100644
> --- a/kernel/dma/swiotlb.c
> +++ b/kernel/dma/swiotlb.c
> @@ -466,8 +466,11 @@ phys_addr_t swiotlb_tbl_map_sin
Hi Sakari,
On Tue, Sep 10, 2019 at 10:05 PM wrote:
>
> From: Dongchun Zhu
>
> This patch mainly adds two more sensor modes for OV8856 CMOS image sensor.
> That is, the resolution of 1632*1224 and 3264*2448, corresponding to the
> bayer order of BGGR.
> The sensor revision also differs in some O
15 matches
Mail list logo
