Re: [PATCH v5 3/7] PCI: Introduce pci_real_dma_dev()

2020-01-22 Thread Bjorn Helgaas
On Tue, Jan 21, 2020 at 06:37:47AM -0700, Jon Derrick wrote: > The current DMA alias implementation requires the aliased device be on > the same PCI bus as the requester ID. This introduces an arch-specific > mechanism to point to another PCI device when doing mapping and > PCI DMA alias search.

Re: [Patch v3 1/3] iommu: avoid unnecessary magazine allocations

2020-01-22 Thread Cong Wang
On Wed, Jan 22, 2020 at 9:07 AM Robin Murphy wrote: > > On 21/01/2020 5:21 pm, Cong Wang wrote: > > On Tue, Jan 21, 2020 at 3:11 AM Robin Murphy wrote: > >> > >> On 18/12/2019 4:39 am, Cong Wang wrote: > >>> The IOVA cache algorithm implemented in IOMMU code does not > >>> exactly match the

Re: [Patch v3 2/3] iommu: optimize iova_magazine_free_pfns()

2020-01-22 Thread Cong Wang
On Wed, Jan 22, 2020 at 9:34 AM Robin Murphy wrote: > Sorry, but without convincing evidence, this change just looks like > churn for the sake of it. The time I wasted on arguing with you isn't worth anything than the value this patch brings. So let's just drop it to save some time. Thanks.

Re: [Patch v3 2/3] iommu: optimize iova_magazine_free_pfns()

2020-01-22 Thread Robin Murphy
On 21/01/2020 5:29 pm, Cong Wang wrote: On Tue, Jan 21, 2020 at 1:52 AM Robin Murphy wrote: On 18/12/2019 4:39 am, Cong Wang wrote: If the magazine is empty, iova_magazine_free_pfns() should be a nop, however it misses the case of mag->size==0. So we should just call iova_magazine_empty().

Re: [PATCH v5 6/7] PCI: vmd: Stop overriding dma_map_ops

2020-01-22 Thread Keith Busch
On Tue, Jan 21, 2020 at 06:37:50AM -0700, Jon Derrick wrote: > Devices on the VMD domain use the VMD endpoint's requester ID and have > been relying on the VMD endpoint's DMA operations. The problem with this > was that VMD domain devices would use the VMD endpoint's attributes when > doing DMA

Re: [PATCH] svm/avic: iommu/amd: Flush IOMMU IRT after update all entries

2020-01-22 Thread Paolo Bonzini
On 20/03/19 09:14, Suthikulpanit, Suravee wrote: > When AVIC is enabled and the VM has discrete device assignment, > the interrupt remapping table (IRT) is used to keep track of which > destination APIC ID the IOMMU will inject the device interrput to. > > This means every time a vcpu is blocked

[PATCH 1/1] iommu/amd: Remove the unnecessary assignment

2020-01-22 Thread Adrian Huang
From: Adrian Huang The assignment of the global variable 'iommu_detected' has been moved from amd_iommu_init_dma_ops() to amd_iommu_detect(), so this patch removes the assignment in amd_iommu_init_dma_ops(). Signed-off-by: Adrian Huang --- drivers/iommu/amd_iommu.c | 1 - 1 file changed, 1

[PATCH 0/3] iommu: Add Allwinner H6 IOMMU driver

2020-01-22 Thread Maxime Ripard
Hi, Here's a series adding support for the IOMMU introduced in the Allwinner H6. The driver from Allwinner hints at more SoCs using it in the future (with more masters), so we can bet on that IOMMU becoming pretty much standard in new SoCs from Allwinner. One thing I wasn't really sure about was

[PATCH 3/3] arm64: dts: allwinner: h6: Add IOMMU

2020-01-22 Thread Maxime Ripard
Now that we have a driver for the IOMMU, let's start using it. Signed-off-by: Maxime Ripard --- arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 11 +++ 1 file changed, 11 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi

[PATCH 2/3] iommu: Add Allwinner H6 IOMMU driver

2020-01-22 Thread Maxime Ripard
The Allwinner H6 has introduced an IOMMU for a few DMA controllers, mostly video related: the display engine, the video decoders / encoders, the camera capture controller, etc. The design is pretty simple compared to other IOMMUs found in SoCs: there's a single instance, controlling all the

[PATCH 1/3] dt-bindings: iommu: Add Allwinner H6 IOMMU bindings

2020-01-22 Thread Maxime Ripard
The Allwinner H6 has introduced an IOMMU. Let's add a device tree binding for it. Signed-off-by: Maxime Ripard --- Documentation/devicetree/bindings/iommu/allwinner,sun50i-h6-iommu.yaml | 61 + 1 file changed, 61 insertions(+) create

[PATCH 0/2] iommu/arm-smmu: Allow client devices to select direct mapping

2020-01-22 Thread Sai Prakash Ranjan
This series allows drm devices to set a default identity mapping using iommu_request_dm_for_dev(). First patch is a cleanup to support other SoCs to call into QCOM specific implementation and preparation for second patch. Second patch sets the default identity domain for drm devices. Jordan

[PATCH 2/2] iommu/arm-smmu: Allow client devices to select direct mapping

2020-01-22 Thread Sai Prakash Ranjan
From: Jordan Crouse Some client devices want to directly map the IOMMU themselves instead of using the DMA domain. Allow those devices to opt in to direct mapping by way of a list of compatible strings. Signed-off-by: Jordan Crouse Co-developed-by: Sai Prakash Ranjan Signed-off-by: Sai

[PATCH 1/2] iommu: arm-smmu-impl: Convert to a generic reset implementation

2020-01-22 Thread Sai Prakash Ranjan
Currently the QCOM specific smmu reset implementation is very specific to SDM845 SoC and has a wait-for-safe logic which may not be required for other SoCs. So move the SDM845 specific logic to its specific reset function. Also add SC7180 SMMU compatible for calling into QCOM specific

Re: [PATCH] iommu/arm-smmu-v3: Batch ATC invalidation commands

2020-01-22 Thread Jean-Philippe Brucker
Hi Rob, On Mon, Jan 13, 2020 at 08:39:06AM -0600, Rob Herring wrote: > Similar to commit 2af2e72b18b4 ("iommu/arm-smmu-v3: Defer TLB > invalidation until ->iotlb_sync()"), build up a list of ATC invalidation > commands and submit them all at once to the command queue instead of > one-by-one. > >