On 1/24/20 5:32 AM, Shuah Khan wrote:
init_iommu_perf_ctr() clobbers the register when it checks write access
to IOMMU perf counters and fails to restore when they are writable.
Add save and restore to fix it.
Signed-off-by: Shuah Khan
---
Changes since v1:
-- Fix bug in sucessful return
From: Logan Gunthorpe
[ Upstream commit 3c124435e8dd516df4b2fc983f4415386fd6edae ]
Non-Transparent Bridge (NTB) devices (among others) may have many DMA
aliases seeing the hardware will send requests with different device ids
depending on their origin across the bridged hardware.
See commit
From: Logan Gunthorpe
[ Upstream commit 3c124435e8dd516df4b2fc983f4415386fd6edae ]
Non-Transparent Bridge (NTB) devices (among others) may have many DMA
aliases seeing the hardware will send requests with different device ids
depending on their origin across the bridged hardware.
See commit
From: Logan Gunthorpe
[ Upstream commit 3332364e4ebc0581d133a334645a20fd13b580f1 ]
Non-Transparent Bridge (NTB) devices (among others) may have many DMA
aliases seeing the hardware will send requests with different device ids
depending on their origin across the bridged hardware.
See commit
init_iommu_perf_ctr() clobbers the register when it checks write access
to IOMMU perf counters and fails to restore when they are writable.
Add save and restore to fix it.
Signed-off-by: Shuah Khan
---
Changes since v1:
-- Fix bug in sucessful return path. Add a return instead of
fall
On 1/21/20 8:32 AM, Shuah Khan wrote:
On 1/20/20 7:10 PM, Suravee Suthikulpanit wrote:
On 1/17/2020 5:08 PM, Joerg Roedel wrote:
Adding Suravee, who wrote the IOMMU Perf Counter code.
On Tue, Jan 14, 2020 at 08:12:20AM -0700, Shuah Khan wrote:
init_iommu_perf_ctr() clobbers the register when
Hi Maxime,
This looks like a pretty decent first cut of a driver, thanks! Plenty of
comments, but overall it looks to be in mostly the right shape to begin
with.
On 22/01/2020 12:44 pm, Maxime Ripard wrote:
The Allwinner H6 has introduced an IOMMU for a few DMA controllers, mostly
video
On Wed, Jan 22, 2020 at 03:12:59PM -0600, Bjorn Helgaas wrote:
> On Tue, Jan 21, 2020 at 06:37:47AM -0700, Jon Derrick wrote:
> > The current DMA alias implementation requires the aliased device be on
> > the same PCI bus as the requester ID. This introduces an arch-specific
> > mechanism to point
On 22/01/2020 5:39 am, Lu Baolu wrote:
Hi Robin,
On 1/21/20 8:45 PM, Robin Murphy wrote:
On 19/01/2020 6:29 am, Lu Baolu wrote:
Hi Joerg,
On 1/17/20 6:21 PM, Joerg Roedel wrote:
On Wed, Jan 01, 2020 at 01:26:47PM +0800, Lu Baolu wrote:
This splits iommu group allocation from adding
On Wed, 22 Jan 2020 13:44:07 +0100, Maxime Ripard wrote:
> The Allwinner H6 has introduced an IOMMU. Let's add a device tree binding
> for it.
>
> Signed-off-by: Maxime Ripard
> ---
> Documentation/devicetree/bindings/iommu/allwinner,sun50i-h6-iommu.yaml | 61
>
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