Re: [PATCH 3/9] memory: mtk-smi: Use clk_bulk instead of the clk ops

On 11/07/2021 10:29, Yong Wu wrote: > On Thu, 2021-07-08 at 11:32 +0200, Krzysztof Kozlowski wrote: >> On 16/06/2021 13:43, Yong Wu wrote: >>> smi have many clocks: apb/smi/gals. >>> This patch use clk_bulk interface instead of the orginal one to simply >>> the code. >>> >>> gals is optional clk(so

[PATCH 5.10 495/593] iommu/amd: Fix extended features logging

From: Alexander Monakov [ Upstream commit 4b21a503adf597773e4b37db05db0e9b16a81d53 ] print_iommu_info prints the EFR register and then the decoded list of features on a separate line: pci :00:00.2: AMD-Vi: Extended features (0x206d73ef22254ade): PPR X2APIC NX GT IA GA PC GA_vAPIC The seco

[PATCH 7/7] hexagon: use the generic global coherent pool

Switch hexagon to use the generic code for dma_alloc_coherent from a global pre-filled pool. Signed-off-by: Christoph Hellwig --- arch/hexagon/Kconfig | 1 + arch/hexagon/kernel/dma.c | 57 --- 2 files changed, 12 insertions(+), 46 deletions(-) diff --g

[PATCH 6/7] dma-mapping: make the global coherent pool conditional

Only build the code to support the global coherent pool if support for it is enabled. Signed-off-by: Christoph Hellwig Tested-by: Dillon Min --- include/linux/dma-map-ops.h | 18 +++--- kernel/dma/coherent.c | 47 - 2 files changed, 35 insertion

[PATCH 5/7] dma-mapping: add a dma_init_global_coherent helper

Add a new helper to initialize the global coherent pool. This both cleans up the existing initialization which indirects through the reserved_mem_ops that are normally only used for struct device, and also allows using the global pool for non-devicetree architectures. Signed-off-by: Christoph Hel

[PATCH 4/7] dma-mapping: simplify dma_init_coherent_memory

Return the allocated dma_coherent_mem structure, set the use_dma_pfn_offset and print the failure warning inside of dma_init_coherent_memory instead of leaving that to the callers. Signed-off-by: Christoph Hellwig Tested-by: Dillon Min --- kernel/dma/coherent.c | 78 ++--

[PATCH 3/7] dma-mapping: allow using the global coherent pool for !ARM

Switch an ifdef so that the global coherent pool is initialized for any architecture that selects the DMA_GLOBAL_POOL symbol insted of hardcoding ARM. Signed-off-by: Christoph Hellwig Tested-by: Dillon Min --- kernel/dma/coherent.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/kernel/dm

[PATCH 2/7] ARM/nommu: use the generic dma-direct code for non-coherent devices

Select the right options to just use the generic dma-direct code instead of reimplementing it. Signed-off-by: Christoph Hellwig Tested-by: Dillon Min --- arch/arm/Kconfig| 5 +- arch/arm/mm/dma-mapping-nommu.c | 173 ++-- 2 files changed, 9 insertio

[PATCH 1/7] dma-direct: add support for dma_coherent_default_memory

Add an option to allocate uncached memory for dma_alloc_coherent from the global dma_coherent_default_memory. This will allow to move arm-nommu (and eventually other platforms) to use generic code for allocating uncached memory from a pre-populated pool. Note that this is a different pool from th

add support for the global coherent pool to the dma core

Hi all, this series adds support for using the global coherent (aka uncached) pool to the generic dma-direct code and then switches arm-nommu and hexagon over to it, together with a bunch of cleanups. Diffstat: arch/arm/Kconfig|5 - arch/arm/mm/dma-mapping-nommu.c | 173 +---

Re: [PATCHv3] iommu/arm-smmu: Optimize ->tlb_flush_walk() for qcom implementation

Hi Robin, On 2021-06-23 19:12, Sai Prakash Ranjan wrote: Currently for iommu_unmap() of large scatter-gather list with page size elements, the majority of time is spent in flushing of partial walks in __arm_lpae_unmap() which is a VA based TLB invalidation invalidating page-by-page on iommus lik

RE: [RFC v2] /dev/iommu uAPI proposal

> From: Alex Williamson > Sent: Saturday, July 10, 2021 5:51 AM > > Hi Kevin, > > A couple first pass comments... > > On Fri, 9 Jul 2021 07:48:44 + > "Tian, Kevin" wrote: > > 2.2. /dev/vfio device uAPI > > ++ > > > > /* > > * Bind a vfio_device to the specified IO

[PATCH v1] iommu/tegra-smmu: Change debugfs directory name

Change debugfs directory name to "smmu", which is a much more obvious name than the generic name of the memory controller device-tree node. Signed-off-by: Dmitry Osipenko --- drivers/iommu/tegra-smmu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/iommu/tegra-smmu.c

Re: [PATCH 1/4] iommu/vt-d: Disable superpage for Geminilake igfx

On 7/10/21 12:47 AM, Ville Syrjala wrote: From: Ville Syrjälä While running "gem_exec_big --r single" from igt-gpu-tools on Geminilake as soon as a 2M mapping is made I tend to get a DMAR write fault. Strangely the faulting address is always a 4K page and usually very far away from the 2M page

Re: [PATCH 3/9] memory: mtk-smi: Use clk_bulk instead of the clk ops

On Thu, 2021-07-08 at 11:32 +0200, Krzysztof Kozlowski wrote: > On 16/06/2021 13:43, Yong Wu wrote: > > smi have many clocks: apb/smi/gals. > > This patch use clk_bulk interface instead of the orginal one to simply > > the code. > > > > gals is optional clk(some larbs may don't have gals). use clk

Re: [PATCH 4/9] memory: mtk-smi: Rename smi_gen to smi_type

On Thu, 2021-07-08 at 11:34 +0200, Krzysztof Kozlowski wrote: > On 16/06/2021 13:43, Yong Wu wrote: > > This is a preparing patch for adding smi sub common. > > Don't write "This patch". Use simple imperative: > "Prepare for adding smi sub common." > > https://elixir.bootlin.com/linux/v5.13/sourc

Re: [PATCH 1/9] dt-bindings: memory: mediatek: Add mt8195 smi binding

On Thu, 2021-07-08 at 11:26 +0200, Krzysztof Kozlowski wrote: > On 16/06/2021 13:43, Yong Wu wrote: > > This patch adds mt8195 smi supporting in the bindings. > > > > In mt8195, there are two smi-common HW, one is for vdo(video output), > > the other is for vpp(video processing pipe). They connect