On Fri, Dec 17, 2021 at 02:49:16PM +0100, Paul Menzel wrote:
> Signed-off-by: Paul Menzel
> ---
> drivers/iommu/amd/init.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Applied, thanks.
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On Fri, Dec 17, 2021 at 03:30:54PM +, Robin Murphy wrote:
> Matthew Wilcox (Oracle) (2):
> iommu/amd: Use put_pages_list
> iommu/vt-d: Use put_pages_list
>
> Robin Murphy (6):
> iommu/iova: Squash entry_dtor abstraction
> iommu/iova: Squash flush_cb abstraction
> iommu/amd: Simplify
On 24/09/2021 11:01, John Garry wrote:
Only dma-iommu.c and vdpa actually use the "fast" mode of IOVA alloc and
free. As such, it's wasteful that all other IOVA domains hold the rcache
memories.
In addition, the current IOVA domain init implementation is poor
(init_iova_domain()), in that errors
On 2021-12-18 07:45, Lu Baolu wrote:
The suported page sizes of an iommu_domain are saved in the pgsize_bitmap
field. Retrieve the value from the right place.
Fixes: 58fd9375c2c534 ("drm/nouveau/platform: probe IOMMU if present")
...except domain->pgsize_bitmap was introduced more than a year
On Sat, Dec 18 2021 at 21:25, Cédric Le Goater wrote:
> On 12/18/21 11:25, Thomas Gleixner wrote:
>> On Fri, Dec 17 2021 at 15:30, Nathan Chancellor wrote:
>>> On Fri, Dec 10, 2021 at 11:19:26PM +0100, Thomas Gleixner wrote:
>>> I just bisected a boot failure on my AMD test desktop to this patch a
From: Joerg Roedel
Some users of iova.h still expect that dma-mapping.h is also included.
Re-add the include until these users are updated to fix compile
failures in the iommu tree.
Signed-off-by: Joerg Roedel
---
include/linux/iova.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include
On 2021-12-20 12:34, Joerg Roedel wrote:
From: Joerg Roedel
Some users of iova.h still expect that dma-mapping.h is also included.
Re-add the include until these users are updated to fix compile
failures in the iommu tree.
Acked-by: Robin Murphy
Signed-off-by: Joerg Roedel
---
include/l
Hi John,
On 2021-12-20 08:49, John Garry wrote:
On 24/09/2021 11:01, John Garry wrote:
Only dma-iommu.c and vdpa actually use the "fast" mode of IOVA alloc and
free. As such, it's wasteful that all other IOVA domains hold the rcache
memories.
In addition, the current IOVA domain init implement
On 2021-11-19 07:19, Nicolin Chen wrote:
From: Nate Watterson
NVIDIA's Grace Soc has a CMDQ-Virtualization (CMDQV) hardware,
which extends the standard ARM SMMU v3 IP to support multiple
VCMDQs with virtualization capabilities. In-kernel of host OS,
they're used to reduce contention on a single
Hi Robin,
Thank you for the reply!
On Mon, Dec 20, 2021 at 06:42:26PM +, Robin Murphy wrote:
> On 2021-11-19 07:19, Nicolin Chen wrote:
> > From: Nate Watterson
> >
> > NVIDIA's Grace Soc has a CMDQ-Virtualization (CMDQV) hardware,
> > which extends the standard ARM SMMU v3 IP to support mu
On 12/16/21 16:00, Hyeonggon Yoo wrote:
> On Tue, Dec 14, 2021 at 01:57:22PM +0100, Vlastimil Babka wrote:
>> On 12/1/21 19:14, Vlastimil Babka wrote:
>> > Folks from non-slab subsystems are Cc'd only to patches affecting them, and
>> > this cover letter.
>> >
>> > Series also available in git, ba
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