On 2022/3/21 20:50, Jason Gunthorpe wrote:
On Sun, Mar 20, 2022 at 02:40:29PM +0800, Lu Baolu wrote:
+static enum iommu_page_response_code
+iommu_sva_handle_iopf(struct iommu_fault *fault, void *data)
+{
+ vm_fault_t ret;
+ struct mm_struct *mm;
+ struct vm_area_struct *vma;
On 2022/3/21 19:39, Jean-Philippe Brucker wrote:
On Sun, Mar 20, 2022 at 02:40:29PM +0800, Lu Baolu wrote:
The existing IOPF handling framework only handles the I/O page faults for
SVA. Ginven that we are able to link iommu domain with each I/O page fault,
we can now make the I/O page fault
On 2022/3/21 20:43, Jason Gunthorpe wrote:
On Mon, Mar 21, 2022 at 11:42:16AM +, Jean-Philippe Brucker wrote:
I tend to disagree with that last part. The fault is caused by a specific
device accessing shared page tables. We should keep that device
information throughout the fault handling,
On 2022/3/21 20:40, Jason Gunthorpe wrote:
On Sun, Mar 20, 2022 at 02:40:28PM +0800, Lu Baolu wrote:
@@ -3098,7 +3101,16 @@ int iommu_attach_device_pasid(struct iommu_domain
*domain,
if (iommu_group_device_count(group) != 1)
goto out_unlock;
+ xa_lock(>pasid_array);
On 2022/3/21 20:05, Jason Gunthorpe wrote:
On Sun, Mar 20, 2022 at 02:40:25PM +0800, Lu Baolu wrote:
+/**
+ * iommu_sva_bind_device() - Bind a process address space to a device
+ * @dev: the device
+ * @mm: the mm to bind, caller must hold a reference to it
+ * @drvdata: opaque data pointer to
On 2022/3/21 19:33, Jean-Philippe Brucker wrote:
On Sun, Mar 20, 2022 at 02:40:25PM +0800, Lu Baolu wrote:
diff --git a/drivers/iommu/iommu-sva-lib.c b/drivers/iommu/iommu-sva-lib.c
index 106506143896..47cf98e661ff 100644
--- a/drivers/iommu/iommu-sva-lib.c
+++ b/drivers/iommu/iommu-sva-lib.c
On 2022/3/21 19:56, Jason Gunthorpe wrote:
On Sun, Mar 20, 2022 at 02:40:23PM +0800, Lu Baolu wrote:
Add support for SVA domain allocation and provide an SVA-specific
iommu_domain_ops.
Signed-off-by: Lu Baolu
include/linux/intel-iommu.h | 1 +
drivers/iommu/intel/iommu.c | 12
> From: Jean-Philippe Brucker
> Sent: Monday, March 21, 2022 7:42 PM
>
> Hi Kevin,
>
> On Mon, Mar 21, 2022 at 08:09:36AM +, Tian, Kevin wrote:
> > > From: Lu Baolu
> > > Sent: Sunday, March 20, 2022 2:40 PM
> > >
> > > The existing IOPF handling framework only handles the I/O page faults
On 2022/3/21 19:47, Jason Gunthorpe wrote:
On Sun, Mar 20, 2022 at 02:40:21PM +0800, Lu Baolu wrote:
Add a new iommu domain type IOMMU_DOMAIN_SVA to represent an I/O page
table which is shared from CPU host VA. Add a sva_cookie field in the
iommu_domain structure to save the mm_struct which
On 2022/3/22 8:26, Tian, Kevin wrote:
From: Lu Baolu
Sent: Monday, March 21, 2022 6:22 PM
- if (features >= 0)
+ if (features >= 0) {
info->pasid_supported = features | 1;
+
On 2022/3/21 19:22, Jean-Philippe Brucker wrote:
Hi Baolu,
On Sun, Mar 20, 2022 at 02:40:20PM +0800, Lu Baolu wrote:
diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
index 627a3ed5ee8f..8e262210b5ad 100644
---
> From: Jean-Philippe Brucker
> Sent: Monday, March 21, 2022 7:36 PM
>
> On Sun, Mar 20, 2022 at 02:40:27PM +0800, Lu Baolu wrote:
> > diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c
> > index c0966fc9b686..4f90b71c6f6e 100644
> > --- a/drivers/iommu/iommu.c
> > +++
> From: Lu Baolu
> Sent: Monday, March 21, 2022 6:22 PM
> >> - if (features >= 0)
> >> + if (features >= 0) {
> >>info->pasid_supported = features | 1;
> >> +
On Sat, Mar 19, 2022 at 07:51:31AM +, Tian, Kevin wrote:
> > From: Jason Gunthorpe
> > Sent: Friday, March 18, 2022 10:13 PM
> >
> > On Fri, Mar 18, 2022 at 02:23:57AM +, Tian, Kevin wrote:
> >
> > > Yes, that is another major part work besides the iommufd work. And
> > > it is not
[Public]
> -Original Message-
> From: Robin Murphy
> Sent: Monday, March 21, 2022 06:12
> To: mika.westerb...@linux.intel.com; Limonciello, Mario
>
> Cc: j...@8bytes.org; baolu...@linux.intel.com; andreas.noe...@gmail.com;
> michael.ja...@intel.com; yehezkel...@gmail.com;
On Sun, Mar 20, 2022 at 02:40:29PM +0800, Lu Baolu wrote:
> +static enum iommu_page_response_code
> +iommu_sva_handle_iopf(struct iommu_fault *fault, void *data)
> +{
> + vm_fault_t ret;
> + struct mm_struct *mm;
> + struct vm_area_struct *vma;
> + unsigned int access_flags = 0;
>
On Mon, Mar 21, 2022 at 11:42:16AM +, Jean-Philippe Brucker wrote:
> I tend to disagree with that last part. The fault is caused by a specific
> device accessing shared page tables. We should keep that device
> information throughout the fault handling, so that we can report it to the
>
On Sun, Mar 20, 2022 at 02:40:28PM +0800, Lu Baolu wrote:
> @@ -3098,7 +3101,16 @@ int iommu_attach_device_pasid(struct iommu_domain
> *domain,
> if (iommu_group_device_count(group) != 1)
> goto out_unlock;
>
> + xa_lock(>pasid_array);
> + curr =
On Sun, Mar 20, 2022 at 02:40:25PM +0800, Lu Baolu wrote:
> +/**
> + * iommu_sva_bind_device() - Bind a process address space to a device
> + * @dev: the device
> + * @mm: the mm to bind, caller must hold a reference to it
> + * @drvdata: opaque data pointer to pass to bind callback
> + *
> + *
On Mon, Mar 21, 2022 at 07:01:45PM +0800, Lu Baolu wrote:
> > one domain can be attached by multiple devices, so this should not be
> > a blind alloc.
>
> Indeed. Perhaps we could associate the SVA domain with the mm->pasid and
> add a user counter inside the domain.
This has the same problem
On Mon, Mar 21, 2022 at 11:31:19AM +, Jean-Philippe Brucker wrote:
> For now we could just return a naked struct iommu_domain. Sanity checks in
> arm_smmu_attach_dev() would be good too, a SVA domain can't be attached as
> a parent domain.
Now that we have per-domain ops the 'standard'
On Sun, Mar 20, 2022 at 02:40:23PM +0800, Lu Baolu wrote:
> Add support for SVA domain allocation and provide an SVA-specific
> iommu_domain_ops.
>
> Signed-off-by: Lu Baolu
> include/linux/intel-iommu.h | 1 +
> drivers/iommu/intel/iommu.c | 12
> drivers/iommu/intel/svm.c | 34
On Mon, Mar 21, 2022 at 07:13:49AM +, Tian, Kevin wrote:
> /*
>* To keep things simple, SVA currently doesn't support IOMMU groups
>* with more than one device. Existing SVA-capable systems are not
>* affected by the problems that required IOMMU groups (lack of
On Sun, Mar 20, 2022 at 02:40:21PM +0800, Lu Baolu wrote:
> Add a new iommu domain type IOMMU_DOMAIN_SVA to represent an I/O page
> table which is shared from CPU host VA. Add a sva_cookie field in the
> iommu_domain structure to save the mm_struct which represent the CPU
> memory page table.
>
>
Hi Kevin,
On Mon, Mar 21, 2022 at 08:09:36AM +, Tian, Kevin wrote:
> > From: Lu Baolu
> > Sent: Sunday, March 20, 2022 2:40 PM
> >
> > The existing IOPF handling framework only handles the I/O page faults for
> > SVA. Ginven that we are able to link iommu domain with each I/O page fault,
>
On Sun, Mar 20, 2022 at 02:40:29PM +0800, Lu Baolu wrote:
> The existing IOPF handling framework only handles the I/O page faults for
> SVA. Ginven that we are able to link iommu domain with each I/O page fault,
> we can now make the I/O page fault handling framework more general for
> more types
On Sun, Mar 20, 2022 at 02:40:27PM +0800, Lu Baolu wrote:
> diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c
> index c0966fc9b686..4f90b71c6f6e 100644
> --- a/drivers/iommu/iommu.c
> +++ b/drivers/iommu/iommu.c
> @@ -27,6 +27,8 @@
> #include
> #include
>
> +#include
On Sun, Mar 20, 2022 at 02:40:25PM +0800, Lu Baolu wrote:
> diff --git a/drivers/iommu/iommu-sva-lib.c b/drivers/iommu/iommu-sva-lib.c
> index 106506143896..47cf98e661ff 100644
> --- a/drivers/iommu/iommu-sva-lib.c
> +++ b/drivers/iommu/iommu-sva-lib.c
> @@ -3,6 +3,8 @@
> * Helpers for IOMMU
On Sun, Mar 20, 2022 at 02:40:24PM +0800, Lu Baolu wrote:
> Add support for SVA domain allocation and provide an SVA-specific
> iommu_domain_ops.
>
> Signed-off-by: Lu Baolu
> ---
> drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 14 ++
> .../iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c | 45
Hi Baolu,
On Sun, Mar 20, 2022 at 02:40:20PM +0800, Lu Baolu wrote:
> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> index 627a3ed5ee8f..8e262210b5ad 100644
> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> +++
On 2022-03-21 10:58, mika.westerb...@linux.intel.com wrote:
Hi Mario,
On Fri, Mar 18, 2022 at 10:29:59PM +, Limonciello, Mario wrote:
[Public]
Between me trying to get rid of iommu_present() and Mario wanting to
support the AMD equivalent of DMAR_PLATFORM_OPT_IN, scrutiny has
shown
that
On 2022/3/21 16:04, Tian, Kevin wrote:
From: Lu Baolu
Sent: Sunday, March 20, 2022 2:40 PM
+struct iommu_sva *
+iommu_sva_bind_device(struct device *dev, struct mm_struct *mm, void
*drvdata)
+{
+ int ret = -EINVAL;
+ struct iommu_sva *handle;
+ struct iommu_domain *domain;
+
+
Hi Mario,
On Fri, Mar 18, 2022 at 10:29:59PM +, Limonciello, Mario wrote:
> [Public]
>
> > Between me trying to get rid of iommu_present() and Mario wanting to
> > support the AMD equivalent of DMAR_PLATFORM_OPT_IN, scrutiny has
> > shown
> > that the iommu_dma_protection attribute is being
On Sat, Mar 19, 2022 at 11:29:06PM -0700, Rajat Jain wrote:
> The "DmaProperty" is supported and documented by Microsoft here:
> https://docs.microsoft.com/en-us/windows-hardware/drivers/pci/dsd-for-pcie-root-ports
> They use this property for DMA protection:
>
On Sat, Mar 19, 2022 at 11:29:05PM -0700, Rajat Jain wrote:
> Rename the field to make it more clear, that the device can execute DMA
> attacks on the system, and thus the system may need protection from
> such attacks from this device.
>
> No functional change intended.
>
> Signed-off-by: Rajat
On 2022/3/21 15:45, Tian, Kevin wrote:
From: Lu Baolu
Sent: Sunday, March 20, 2022 2:40 PM
Add support for SVA domain allocation and provide an SVA-specific
iommu_domain_ops.
Signed-off-by: Lu Baolu
---
include/linux/intel-iommu.h | 1 +
drivers/iommu/intel/iommu.c | 12
On 2022/3/21 15:13, Tian, Kevin wrote:
From: Lu Baolu
Sent: Sunday, March 20, 2022 2:40 PM
Attaching an IOMMU domain to a PASID of a device is a generic operation
for modern IOMMU drivers which support PASID-granular DMA address
translation. Currently visible usage scenarios include (but not
On 2022/3/21 15:06, Tian, Kevin wrote:
From: Lu Baolu
Sent: Sunday, March 20, 2022 2:40 PM
Add a new iommu domain type IOMMU_DOMAIN_SVA to represent an I/O
page
table which is shared from CPU host VA. Add a sva_cookie field in the
iommu_domain structure to save the mm_struct which represent the
On 2022/3/21 15:01, Tian, Kevin wrote:
From: Lu Baolu
Sent: Sunday, March 20, 2022 2:40 PM
Use this field to save the pasid/ssid bits that a device is able to
support with its IOMMU hardware. It is a generic attribute of a device
and lifting it into the per-device dev_iommu struct makes it
> From: Lu Baolu
> Sent: Sunday, March 20, 2022 2:40 PM
>
> The existing IOPF handling framework only handles the I/O page faults for
> SVA. Ginven that we are able to link iommu domain with each I/O page fault,
> we can now make the I/O page fault handling framework more general for
> more
> From: Lu Baolu
> Sent: Sunday, March 20, 2022 2:40 PM
> +struct iommu_sva *
> +iommu_sva_bind_device(struct device *dev, struct mm_struct *mm, void
> *drvdata)
> +{
> + int ret = -EINVAL;
> + struct iommu_sva *handle;
> + struct iommu_domain *domain;
> +
> + handle =
> From: Lu Baolu
> Sent: Sunday, March 20, 2022 2:40 PM
>
> Add support for SVA domain allocation and provide an SVA-specific
> iommu_domain_ops.
>
> Signed-off-by: Lu Baolu
> ---
> include/linux/intel-iommu.h | 1 +
> drivers/iommu/intel/iommu.c | 12
>
> From: Lu Baolu
> Sent: Sunday, March 20, 2022 2:40 PM
>
> Attaching an IOMMU domain to a PASID of a device is a generic operation
> for modern IOMMU drivers which support PASID-granular DMA address
> translation. Currently visible usage scenarios include (but not limited):
>
> - SVA
> -
> From: Lu Baolu
> Sent: Sunday, March 20, 2022 2:40 PM
>
> Add a new iommu domain type IOMMU_DOMAIN_SVA to represent an I/O
> page
> table which is shared from CPU host VA. Add a sva_cookie field in the
> iommu_domain structure to save the mm_struct which represent the CPU
> memory page table.
> From: Lu Baolu
> Sent: Sunday, March 20, 2022 2:40 PM
>
> Use this field to save the pasid/ssid bits that a device is able to
> support with its IOMMU hardware. It is a generic attribute of a device
> and lifting it into the per-device dev_iommu struct makes it possible
> to allocate a PASID
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