> From: Lu Baolu
> Sent: Wednesday, March 30, 2022 1:00 PM
> >
> > btw I'm not sure whether this is what SVA requires. IIRC the problem with
> > SVA is because PASID TLP prefix is not counted in PCI packet routing thus
> > a DMA target address with PASID might be treated as P2P if the address
> >
> From: Jason Gunthorpe
> Sent: Tuesday, March 29, 2022 7:43 PM
>
> On Tue, Mar 29, 2022 at 08:42:13AM +, Tian, Kevin wrote:
>
> > btw I'm not sure whether this is what SVA requires. IIRC the problem with
> > SVA is because PASID TLP prefix is not counted in PCI packet routing thus
> > a DMA
Hi Kevin,
On 2022/3/29 16:42, Tian, Kevin wrote:
From: Lu Baolu
Sent: Tuesday, March 29, 2022 1:38 PM
Some of the interfaces in the IOMMU core require that only a single
kernel device driver controls the device in the IOMMU group. The
existing method is to check the device count in the IOMMU g
On 2022/3/30 5:38, Jacob Pan wrote:
+static struct iommu_domain *
+iommu_sva_alloc_domain(struct device *dev, struct mm_struct *mm)
+{
+ struct bus_type *bus = dev->bus;
+ struct iommu_sva_cookie *cookie;
+ struct iommu_domain *domain;
+ void *curr;
+
+ if (!bus || !
Hi Jacob,
On 2022/3/30 5:00, Jacob Pan wrote:
Hi BaoLu,
On Tue, 29 Mar 2022 13:37:50 +0800, Lu Baolu
wrote:
Use this field to save the pasid/ssid bits that a device is able to
support with its IOMMU hardware. It is a generic attribute of a device
and lifting it into the per-device dev_iommu s
Hi BaoLu,
On Tue, 29 Mar 2022 13:37:52 +0800, Lu Baolu
wrote:
> Add a new iommu domain type IOMMU_DOMAIN_SVA to represent an I/O page
> table which is shared from CPU host VA. Add some helpers to get and
> put an SVA domain and implement SVA domain life cycle management.
>
> Signed-off-by: Lu B
Hi BaoLu,
On Tue, 29 Mar 2022 13:37:50 +0800, Lu Baolu
wrote:
> Use this field to save the pasid/ssid bits that a device is able to
> support with its IOMMU hardware. It is a generic attribute of a device
> and lifting it into the per-device dev_iommu struct makes it possible
> to allocate a PAS
Hi Kevin,
On Fri, 18 Mar 2022 06:16:58 +, "Tian, Kevin"
wrote:
> > From: Jacob Pan
> > Sent: Tuesday, March 15, 2022 1:07 PM
> >
> > In-kernel DMA with PASID should use DMA API now, remove supervisor
> > PASID
> > SVA support. Remove special cases in bind mm and page request service.
> >
Hi Kevin,
On Fri, 18 Mar 2022 06:10:40 +, "Tian, Kevin"
wrote:
> > From: Jacob Pan
> > Sent: Tuesday, March 15, 2022 1:07 PM
> >
> > The current in-kernel supervisor PASID support is based on the SVM/SVA
> > machinery in SVA lib. The binding between a kernel PASID and kernel
> > mapping ha
The pull request you sent on Tue, 29 Mar 2022 15:50:24 +0200:
> git://git.infradead.org/users/hch/dma-mapping.git tags/dma-mapping-5.18
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/9ae2a143081fa8fba5042431007b33d9a855b7a2
Thank you!
--
Deet-doot-dot, I am a bot.
h
On 3/28/22 10:28, Alex Deucher wrote:
> +How is IOVA generated?
> +--
> +
> +Well behaved drivers call dma_map_*() calls before sending command to device
> +that needs to perform DMA. Once DMA is completed and mapping is no longer
> +required, driver performs dma_unmap_*() calls
The following changes since commit 0280e3c58f92b2fe0e8fbbdf8d386449168de4a8:
Merge tag 'nfs-for-5.17-1' of git://git.linux-nfs.org/projects/anna/linux-nfs
(2022-01-25 20:16:03 +0200)
are available in the Git repository at:
git://git.infradead.org/users/hch/dma-mapping.git tags/dma-mapping-5
On Thu, Mar 24, 2022 at 09:14:50AM -0700, Michael Kelley wrote:
> Hyper-V VMs have VMbus synthetic devices and PCI pass-thru devices that are
> added
> dynamically via the VMbus protocol and are not represented in the ACPI DSDT.
> Only
> the top level VMbus node exists in the DSDT. As such, on AR
On Tue, Mar 29, 2022 at 12:59:52PM +0800, Jason Wang wrote:
> vDPA has a backend feature negotiation, then actually, userspace can
> tell vDPA to go with the new accounting approach. Not sure RDMA can do
> the same.
A security feature userspace can ask to turn off is not really a
security feature
On Tue, Mar 29, 2022 at 08:42:13AM +, Tian, Kevin wrote:
> btw I'm not sure whether this is what SVA requires. IIRC the problem with
> SVA is because PASID TLP prefix is not counted in PCI packet routing thus
> a DMA target address with PASID might be treated as P2P if the address
> falls into
On 29/03/22 00.28, Alex Deucher wrote:
Based on feedback from Robin on the initial AMD IOMMU
documentation, fix up the Intel documentation to
clarify IOMMU vs device and modern DMA API.
Maybe we can squash into [1/2]?
--
An old man doll... just what I always wanted! - Clara
__
On 2022/3/24 06:51, Alex Williamson wrote:
On Fri, 18 Mar 2022 14:27:36 -0300
Jason Gunthorpe wrote:
iommufd can directly implement the /dev/vfio/vfio container IOCTLs by
mapping them into io_pagetable operations. Doing so allows the use of
iommufd by symliking /dev/vfio/vfio to /dev/iommufd.
> From: Lu Baolu
> Sent: Tuesday, March 29, 2022 1:38 PM
>
> Some of the interfaces in the IOMMU core require that only a single
> kernel device driver controls the device in the IOMMU group. The
> existing method is to check the device count in the IOMMU group in
> the interfaces. This is unreli
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