Re: [PATCH] crypto: qat - stop using iommu_present()

On Tue, Apr 05, 2022 at 01:25:11PM +0100, Robin Murphy wrote: > Even if an IOMMU might be present for some PCI segment in the system, > that doesn't necessarily mean it provides translation for the device > we care about. Replace iommu_present() with a more appropriate check. > > Signed-off-by:

Re: [PATCH] habanalabs: Stop using iommu_present()

On Tue, Apr 5, 2022 at 4:46 PM Robin Murphy wrote: > > Even if an IOMMU might be present for some PCI segment in the system, > that doesn't necessarily mean it provides translation for the device > we care about. Replace iommu_present() with a more appropriate check. > > Signed-off-by: Robin

[PATCH RFC v3 12/12] iommu: Rename iommu-sva-lib.{c,h}

Rename iommu-sva-lib.c[h] to iommu-sva.c[h] as it contains all code for SVA implementation in iommu core. Signed-off-by: Lu Baolu --- drivers/iommu/{iommu-sva-lib.h => iommu-sva.h} | 0 drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c | 2 +- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 2

[PATCH RFC v3 11/12] iommu: Per-domain I/O page fault handling

Tweak the I/O page fault handling framework to route the page faults to the domain and call the page fault handler retrieved from the domain. This makes the I/O page fault handling framework possible to serve more usage scenarios as long as they have an IOMMU domain and install a page fault

[PATCH RFC v3 10/12] iommu: Prepare IOMMU domain for IOPF

This adds some mechanisms around the iommu_domain so that the I/O page fault handling framework could route a page fault to the domain and call the fault handler from it. It includes: - A reference counter for the iommu domain. The page fault handler is a different context from the

[PATCH RFC v3 09/12] iommu: Remove SVA related callbacks from iommu ops

These ops'es have been replaced with the dev_attach/detach_pasid domain ops'es. There's no need for them anymore. Remove them to avoid dead code. Signed-off-by: Lu Baolu --- include/linux/intel-iommu.h | 4 -- include/linux/iommu.h | 8 ---

[PATCH RFC v3 08/12] iommu/sva: Use attach/detach_pasid_dev in SVA interfaces

The existing iommu SVA interfaces are implemented by calling the SVA specific iommu ops provided by the IOMMU drivers. There's no need for any SVA specific ops in iommu_ops vector anymore as we can achieve this through the generic attach/detach_dev_pasid domain ops. This refactors the IOMMU SVA

[PATCH RFC v3 07/12] arm-smmu-v3/sva: Add SVA domain support

Add support for SVA domain allocation and provide an SVA-specific iommu_domain_ops. Signed-off-by: Lu Baolu --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 14 +++ .../iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c | 42 +++ drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 21

[PATCH RFC v3 06/12] iommu/vt-d: Add SVA domain support

Add support for SVA domain allocation and provide an SVA-specific iommu_domain_ops. Signed-off-by: Lu Baolu --- include/linux/intel-iommu.h | 1 + drivers/iommu/intel/iommu.c | 10 ++ drivers/iommu/intel/svm.c | 37 + 3 files changed, 48

[PATCH RFC v3 05/12] iommu/vt-d: Remove SVM_FLAG_SUPERVISOR_MODE support

The current in-kernel supervisor PASID support is based on the SVA machinery in SVA lib. The binding between a kernel PASID and kernel mapping has many flaws. Remove SVM_FLAG_SUPERVISOR_MODE support. Link: https://lore.kernel.org/linux-iommu/20210511194726.gp1002...@nvidia.com/ Signed-off-by:

[PATCH RFC v3 04/12] iommu/sva: Basic data structures for SVA

Use below data structures for SVA implementation in the IOMMU core: - struct iommu_sva_ioas Represent the I/O address space shared with an application CPU address space. This structure has a 1:1 relationship with an mm_struct. It graps a "mm->mm_count" refcount during creation and drop it

[PATCH RFC v3 03/12] iommu: Add attach/detach_dev_pasid domain ops

Attaching an IOMMU domain to a PASID of a device is a generic operation for modern IOMMU drivers which support PASID-granular DMA address translation. Currently visible usage scenarios include (but not limited): - SVA (Shared Virtual Address) - kernel DMA with PASID - hardware-assist mediated

[PATCH RFC v3 02/12] iommu: Add a flag to indicate immutable singleton group

Some features require that a single device must be immutably isolated, even when hot plug is supported. For example, the SVA bind()/unbind() interfaces require that the device exists in a singleton group. If we have a singleton group that doesn't have ACS (or similar technologies) and someone

[PATCH RFC v3 01/12] iommu: Add pasid_bits field in struct dev_iommu

Use this field to save the pasid/ssid bits that a device is able to support with its IOMMU hardware. It is a generic attribute of a device and lifting it into the per-device dev_iommu struct makes it possible to allocate a PASID for device without calls into the IOMMU drivers. Any iommu driver

[PATCH RFC v3 00/12] iommu: SVA and IOPF refactoring

Hi folks, The former part of this series refactors the IOMMU SVA code by assigning an SVA type of iommu_domain to a shared virtual address and replacing sva_bind/unbind iommu ops with attach/detach_dev_pasid domain ops. The latter part changes the existing I/O page fault handling framework from