Existing exynos-iommu driver only supports SysMMU versions up to v5. But
it's pretty much ready for basic usage with SysMMU v7, only small
changes have to be done. As SysMMU version is tested dynamically (by
reading the corresponding register), there is no need to introduce new
compatible string.
SysMMU v7 might have different register layouts (VM capable or non-VM
capable). Check which layout is implemented in current SysMMU module and
prepare the corresponding register table for futher usage. This way is
faster and more elegant than checking corresponding condition (if it's
VM or non-VM S
SysMMU v5+ supports 36 bit physical address space. Set corresponding DMA
mask to avoid falling back to SWTLBIO usage in dma_map_single() because
of failed dma_capable() check.
The original code for this fix was suggested by Marek.
Originally-by: Marek Szyprowski
Signed-off-by: Sam Protsenko
---
SysMMU v7 can have Virtual Machine registers, which implement multiple
translation domains. The driver should know if it's true or not, as VM
registers shouldn't be accessed if not present. Read corresponding
capabilities register to obtain that info, and store it in driver data.
Signed-off-by: Sa
Add minimal viable support for SysMMU v7.x, which can be found in modern
Exynos chips (like Exynos850). SysMMU v7.x may implement VM register
set, and those registers should be initialized properly if present.
Usually 8 translation domains are supported via VM registers (0..7), but
only n=0 (defaul
On Sun, 3 Jul 2022 at 00:37, Sam Protsenko wrote:
>
> Existing exynos-iommu driver only supports SysMMU versions up to v5. But
> it's pretty much ready for basic usage with SysMMU v7, only small
> changes have to be done. As SysMMU version is tested dynamically (by
> reading the corresponding regi
On Wed, 22 Jun 2022 at 12:57, Marek Szyprowski wrote:
>
>
> On 22.06.2022 11:14, Robin Murphy wrote:
> > On 2022-06-21 20:57, Sam Protsenko wrote:
> >> Hi Marek,
> >>
> >> On Fri, 21 Jan 2022 at 14:31, Marek Szyprowski
> >> wrote:
> >>
> >> [snip]
> >>
> >>>
> >>> Well, for starting point the exi
esOn Fri, Jul 01, 2022 at 07:49:42AM +0800, kbuild test robot wrote:
> tree/branch:
> https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
> branch HEAD: 6cc11d2a1759275b856e464265823d94aabd5eaf Add linux-next
> specific files for 20220630
>
> Error/Warning reports:
>
> h
On Tue, 14 Jun 2022 16:01:36 -0700, Emma Anholt wrote:
> This is an SMMU for the adreno gpu, and adding this compatible lets
> the driver use per-fd page tables, which are required for security
> between GPU clients.
>
>
Applied, thanks!
[2/2] arm64: dts: qcom: sm8250: Enable per-process page t
On 2022/7/1 15:58, Tian, Kevin wrote:
From: Lu Baolu Sent: Wednesday, June 29,
2022 3:47 PM
The disable_dmar_iommu() is called when IOMMU initialization fails
or the IOMMU is hot-removed from the system. In both cases, there
is no need to clear the IOMMU translation data structures for
devices.
On 2022/7/1 16:15, Tian, Kevin wrote:
From: Lu Baolu
Sent: Wednesday, June 29, 2022 3:47 PM
+ spin_lock_irqsave(&device_domain_lock, flags);
list_for_each_entry(info, &domain->devices, link) {
- if (!info->dev)
- continue;
-
suppose you can re
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