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> > @@ -305,6 +306,21 @@ void *dma_direct_alloc(struct device *dev, size_t size,
> > ret = page_address(page);
> > if (dma_set_decrypted(dev, ret, size))
> > goto out_free_pages;
> > +#ifdef CONFIG_HAS_IOMEM
> > + /*
> > +* Remap the
On Thu, Jul 07, 2022 at 10:08:33AM +0200, Greg KH wrote:
[ ... ]
> >
> > Unverified Error/Warning (likely false positive, please contact us if
> > interested):
> >
> > arch/x86/events/core.c:2114 init_hw_perf_events() warn: missing error code
> > 'err'
> > drivers/android/binder.c:1481:19-23:
On 07.07.22 11:39, Marc Zyngier wrote:
Hello Marc
> On Sun, 03 Jul 2022 16:22:03 +0100,
> Oleksandr wrote:
>>
>> On 01.07.22 23:00, Samuel Holland wrote:
>>
>>
>> Hello Samuel
>>
>>> Some architectures and irqchip drivers modify the cpumask returned by
>>> irq_data_get_affinity_mask, usually
On 06/07/2022 16:38, Krzysztof Kozlowski wrote:
On 06/07/2022 15:48, Matthias Brugger wrote:
On 04/07/2022 14:36, Krzysztof Kozlowski wrote:
On 04/07/2022 12:00, Tinghan Shen wrote:
The max clock items for the dts node with compatible
'mediatek,mt8195-smi-sub-common' should be 3.
However
On 2022/7/7 1:57, Mathieu Poirier wrote:
> Hi,
>
> I have started looking at this set.
Thanks!
>
> On Mon, Jun 06, 2022 at 07:55:54PM +0800, Yicong Yang wrote:
>> Document the introduction and usage of HiSilicon PTT device driver.
>>
>> Signed-off-by: Yicong Yang
>> Reviewed-by: Jonathan Camer
On Thu, Jul 07, 2022 at 09:22:26AM +0100, Marc Zyngier wrote:
> On Tue, 05 Jul 2022 14:52:43 +0100,
> Serge Semin wrote:
> >
> > Hi Samuel
> >
> > On Fri, Jul 01, 2022 at 03:00:49PM -0500, Samuel Holland wrote:
> > > The MIPS GIC irqchip driver may be selected in a uniprocessor
> > > configurati
On 2022/7/7 16:30, Ethan Zhao wrote:
-static int show_device_domain_translation(struct device *dev, void *data)
+static int __show_device_domain_translation(struct device *dev, void *data)
{
- struct device_domain_info *info = dev_iommu_priv_get(dev);
- struct dmar_domain *domain =
On 7/7/2022 4:08 PM, Greg KH wrote:
On Thu, Jul 07, 2022 at 02:56:34PM +0800, kernel test robot wrote:
tree/branch:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
branch HEAD: 088b9c375534d905a4d337c78db3b3bfbb52c4a0 Add linux-next specific
files for 20220706
E
On Sun, 03 Jul 2022 16:22:03 +0100,
Oleksandr wrote:
>
>
> On 01.07.22 23:00, Samuel Holland wrote:
>
>
> Hello Samuel
>
> > Some architectures and irqchip drivers modify the cpumask returned by
> > irq_data_get_affinity_mask, usually by copying in to it. This is
> > problematic for uniproces
Baolu，
在 2022/7/6 10:55, Lu Baolu 写道:
The domain_translation_struct debugfs node is used to dump the DMAR page
tables for the PCI devices. It potentially races with setting domains to
devices. The existing code uses the global spinlock device_domain_lock to
avoid the races.
This removes the use
From: Tianyu Lan
Traditionally swiotlb was not performance critical because it was only
used for slow devices. But in some setups, like TDX/SEV confidential
guests, all IO has to go through swiotlb. Currently swiotlb only has a
single lock. Under high IO load with multiple CPUs this can lead to
s
On Tue, 05 Jul 2022 14:52:43 +0100,
Serge Semin wrote:
>
> Hi Samuel
>
> On Fri, Jul 01, 2022 at 03:00:49PM -0500, Samuel Holland wrote:
> > The MIPS GIC irqchip driver may be selected in a uniprocessor
> > configuration, but it unconditionally registers an IPI domain.
> >
> > Limit the part of
On Thu, Jul 07, 2022 at 06:58:40AM +0200, Christoph Hellwig wrote:
> On Wed, Jun 29, 2022 at 08:41:32AM +0200, Greg Kroah-Hartman wrote:
> > On Wed, Jun 29, 2022 at 08:28:37AM +0200, Christoph Hellwig wrote:
> > > Any comments or additional testing? It would be really great to get
> > > this off t
On Thu, Jul 07, 2022 at 02:56:34PM +0800, kernel test robot wrote:
> tree/branch:
> https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
> branch HEAD: 088b9c375534d905a4d337c78db3b3bfbb52c4a0 Add linux-next
> specific files for 20220706
>
> Error/Warning reports:
>
> htt
On Thu, Jul 7, 2022 at 6:58 AM Christoph Hellwig wrote:
> On Wed, Jun 29, 2022 at 08:41:32AM +0200, Greg Kroah-Hartman wrote:
> > On Wed, Jun 29, 2022 at 08:28:37AM +0200, Christoph Hellwig wrote:
> > > Any comments or additional testing? It would be really great to get
> > > this off the table.
Hi Robin,
On 7/6/2022 10:15 PM, Robin Murphy wrote:
On 2022-05-26 05:14, Sai Prakash Ranjan wrote:
TLB sync timeouts can be due to various reasons such as TBU power down
or pending TCU/TBU invalidation/sync and so on. Debugging these often
require dumping of some implementation defined register
On Wed, Jul 06, 2022 at 12:50:31PM +0100, Will Deacon wrote:
> On Thu, Jun 30, 2022 at 05:29:24PM +0800, yf.w...@mediatek.com wrote:
> > This patchset adds MediaTek TTBR up to 35bit support for single normal zone.
> >
> > Changes in v12:
> > - Update [PATCH 1/2]: remove GENMASK(31, 7)
> > - Update
On Wed, Jul 06, 2022 at 05:07:50PM +0530, Vasant Hegde wrote:
>As discussed in other thread, I have updated "From:" tag and
>resending patchset. No changes in the actual patch content.
>This patchset is based on top on "iommu/x86/amd" branch.
>Base commit : 0d10fe75911787 ("iommu/am
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