Hi Joerg,
On Thu, Jun 18, 2015 at 10:50:20AM +0200, Joerg Roedel wrote:
From: Joerg Roedel jroe...@suse.de
The use of the SR-IOV lock for ATS causes a dead-lock in the
AMD-IOMMU driver when virtual functions are added that have
an ATS capability.
The problem is that the VFs will be added
[+cc Rafael]
On Tue, Jul 07, 2015 at 01:14:27PM -0400, Mark Hounschell wrote:
On 07/07/2015 11:15 AM, Bjorn Helgaas wrote:
On Wed, May 20, 2015 at 08:11:17AM -0400, Mark Hounschell wrote:
Most currently available hardware doesn't allow reads but will allow
writes on PCIe peer-to-peer
On Tue, Jul 7, 2015 at 10:41 AM, Alex Williamson
alex.william...@redhat.com wrote:
On Tue, 2015-07-07 at 10:15 -0500, Bjorn Helgaas wrote:
[+cc Alex]
Hi Mark,
On Wed, May 20, 2015 at 08:11:17AM -0400, Mark Hounschell wrote:
Most currently available hardware doesn't allow reads
[+cc Alex]
Hi Mark,
On Wed, May 20, 2015 at 08:11:17AM -0400, Mark Hounschell wrote:
Most currently available hardware doesn't allow reads but will allow
writes on PCIe peer-to-peer transfers. All current AMD chipsets are
this way. I'm pretty sure all Intel chipsets are this way also. What
[+cc Mark, Joerg, Konrad, Alex]
Hi Will,
On Wed, Jul 01, 2015 at 01:14:30PM -0500, Will Davis wrote:
From: Bjorn Helgaas bhelg...@google.com
On Fri, May 29, 2015 at 12:14:46PM -0500, wda...@nvidia.com wrote:
From: Will Davis wda...@nvidia.com
Lookup the bus address of the resource
On Fri, May 29, 2015 at 12:14:42PM -0500, wda...@nvidia.com wrote:
From: Will Davis wda...@nvidia.com
Simply route these through to the new dma_(un)map_resource APIs.
Signed-off-by: Will Davis wda...@nvidia.com
Reviewed-by: Terence Ripperda trippe...@nvidia.com
Reviewed-by: John Hubbard
On Fri, May 29, 2015 at 12:14:46PM -0500, wda...@nvidia.com wrote:
From: Will Davis wda...@nvidia.com
Lookup the bus address of the resource by finding the parent host bridge,
which may be different than the parent host bridge of the target device.
Signed-off-by: Will Davis
On Fri, May 29, 2015 at 12:14:44PM -0500, wda...@nvidia.com wrote:
From: Will Davis wda...@nvidia.com
Implement 'map_resource' for the AMD IOMMU driver. Generalize the existing
map_page implementation to operate on a physical address, and make both
map_page and map_resource wrappers around
[+cc Dave, Jonathan]
On Mon, May 18, 2015 at 01:25:01PM -0500, wda...@nvidia.com wrote:
From: Will Davis wda...@nvidia.com
Add references to both the general API documentation as well as the HOWTO.
Signed-off-by: Will Davis wda...@nvidia.com
---
Documentation/DMA-API-HOWTO.txt | 39
On Mon, May 11, 2015 at 9:30 AM, Konrad Rzeszutek Wilk
konrad.w...@oracle.com wrote:
On Thu, May 07, 2015 at 10:19:05AM -0500, Bjorn Helgaas wrote:
[+cc Dave for sparc64, Yinghai]
On Fri, May 01, 2015 at 01:32:15PM -0500, wda...@nvidia.com wrote:
From: Will Davis wda...@nvidia.com
Simply
On Wed, May 6, 2015 at 8:48 PM, Yijing Wang wangyij...@huawei.com wrote:
On 2015/5/7 6:18, Bjorn Helgaas wrote:
[+cc Yijing, Dave J, Dave M, Alex]
On Fri, May 01, 2015 at 01:32:12PM -0500, wda...@nvidia.com wrote:
From: Will Davis wda...@nvidia.com
Hi,
This patch series adds DMA APIs
On Fri, May 01, 2015 at 01:32:14PM -0500, wda...@nvidia.com wrote:
From: Will Davis wda...@nvidia.com
Add functions to DMA-map and -unmap a resource for a given device. This
will allow devices to DMA-map a peer device's resource (for example,
another device's BAR region on PCI) to enable
[+cc Dave for sparc64, Yinghai]
On Fri, May 01, 2015 at 01:32:15PM -0500, wda...@nvidia.com wrote:
From: Will Davis wda...@nvidia.com
Simply route these through to the new dma_(un)map_resource APIs.
Signed-off-by: Will Davis wda...@nvidia.com
Reviewed-by: Terence Ripperda
On Thu, May 7, 2015 at 11:23 AM, William Davis wda...@nvidia.com wrote:
-Original Message-
From: Bjorn Helgaas [mailto:bhelg...@google.com]
Sent: Thursday, May 7, 2015 8:13 AM
To: Yijing Wang
Cc: William Davis; Joerg Roedel; open list:INTEL IOMMU (VT-d); linux-
p...@vger.kernel.org
[+cc Yijing, Dave J, Dave M, Alex]
On Fri, May 01, 2015 at 01:32:12PM -0500, wda...@nvidia.com wrote:
From: Will Davis wda...@nvidia.com
Hi,
This patch series adds DMA APIs to map and unmap a struct resource to and from
a PCI device's IOVA domain, and implements the AMD, Intel, and nommu
On Tue, Mar 03, 2015 at 05:54:25PM -0500, Murali Karicheri wrote:
On 03/03/2015 03:53 PM, Bjorn Helgaas wrote:
[+cc linux-pci]
On Tue, Mar 3, 2015 at 11:55 AM, Murali Karicherim-kariche...@ti.com
wrote:
On 03/02/2015 10:43 PM, Bjorn Helgaas wrote:
On Mon, Mar 2, 2015 at 3:59 PM, Murali
[+cc linux-pci]
On Tue, Mar 3, 2015 at 11:55 AM, Murali Karicheri m-kariche...@ti.com wrote:
On 03/02/2015 10:43 PM, Bjorn Helgaas wrote:
On Mon, Mar 2, 2015 at 3:59 PM, Murali Karicherim-kariche...@ti.com
wrote:
Move of_dma_configure() to device.c so it can be re-used for PCI devices
a...@arndb.de
Cc: Suravee Suthikulpanit suravee.suthikulpa...@amd.com
Acked-by: Bjorn Helgaas bhelg...@google.com
Signed-off-by: Murali Karicheri m-kariche...@ti.com
---
drivers/pci/probe.c |2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
On Tue, Jan 27, 2015 at 12:14 PM, Murali Karicheri m-kariche...@ti.com wrote:
On 01/26/2015 06:59 PM, Bjorn Helgaas wrote:
On Mon, Jan 26, 2015 at 5:25 PM, Murali Karicherim-kariche...@ti.com
wrote:
On 01/23/2015 06:41 PM, Bjorn Helgaas wrote:
On Fri, Jan 23, 2015 at 05:32:37PM -0500
On Mon, Jan 26, 2015 at 5:25 PM, Murali Karicheri m-kariche...@ti.com wrote:
On 01/23/2015 06:41 PM, Bjorn Helgaas wrote:
On Fri, Jan 23, 2015 at 05:32:37PM -0500, Murali Karicheri wrote:
Add of_pci_dma_configure() to allow updating the dma configuration
of the pci device using
configuration.
Cc: Joerg Roedel j...@8bytes.org
Cc: Grant Likely grant.lik...@linaro.org
Cc: Rob Herring robh...@kernel.org
Cc: Bjorn Helgaas bhelg...@google.com
Cc: Will Deacon will.dea...@arm.com
Cc: Russell King li...@arm.linux.org.uk
Cc: Arnd Bergmann a...@arndb.de
Cc: Suravee
...@linaro.org
Cc: Rob Herring robh...@kernel.org
Cc: Bjorn Helgaas bhelg...@google.com
Cc: Will Deacon will.dea...@arm.com
Cc: Russell King li...@arm.linux.org.uk
Cc: Arnd Bergmann a...@arndb.de
Cc: Suravee Suthikulpanit suravee.suthikulpa...@amd.com
Signed-off-by: Murali Karicheri m-kariche
On Fri, Nov 21, 2014 at 03:08:27PM -0700, Alex Williamson wrote:
I'd like to make vfio-pci capable of manipulating the device exposed
to the user such that if the host can only support a single MSI
vector then we hide the fact that the device itself may actually be
able to support more. When
On Wed, Jan 7, 2015 at 5:05 PM, Murali Karicheri m-kariche...@ti.com wrote:
On 01/07/2015 01:49 PM, Murali Karicheri wrote:
PCI devices on Keystone doesn't have correct dma_pfn_offset set. This
patch
add capability to set the dma configuration such as dma-mask,
dma_pfn_offset,
and dma ops
[+cc Alex, linux-pci, iommu]
On Thu, Dec 25, 2014 at 12:13 PM, bugzilla-dae...@bugzilla.kernel.org wrote:
https://bugzilla.kernel.org/show_bug.cgi?id=90311
Bug ID: 90311
Summary: Hibernate failure with intel_iommu
Product: Drivers
Version: 2.5
[+to David, +cc iommu list, Joerg]
On Sun, Dec 14, 2014 at 7:44 AM, bugzilla-dae...@bugzilla.kernel.org wrote:
https://bugzilla.kernel.org/show_bug.cgi?id=89751
Bug ID: 89751
Summary: Allocating domain for fallback device failed
Product: Drivers
s/unsued/unused/ in subject (here and other patches).
Clean up is slightly ambiguous; it could mean either make better or
remove. Remove unused code would be less ambiguous.
On Tue, Nov 25, 2014 at 03:49:42PM +0800, Jiang Liu wrote:
Now we have converted to hierarchy irqdomain, so clean up
[+cc Alex, add a subject]
On Fri, Nov 14, 2014 at 6:49 PM, Allan, Bruce W bruce.w.al...@intel.com wrote:
Let's try this again as plain text...
For a PCIe device with SR-IOV support enabled (e.g. the PF device ID is
0xf001 at :07:00.0 and the 16 VFs have device ID 0xf002 at :07:01.0
checks in IRQ remapping drivers, PCI MSI core
already guarattees these.
guarantees
Signed-off-by: Jiang Liu jiang@linux.intel.com
Acked-by: Bjorn Helgaas bhelg...@google.com
---
drivers/iommu/irq_remapping.c |8
drivers/pci/msi.c | 40
Hi Antonios,
On Mon, Oct 27, 2014 at 12:07 PM, Antonios Motakis
a.mota...@virtualopensystems.com wrote:
The virqfd functionality that is used by VFIO_PCI to implement interrupt
masking and unmasking via an eventfd, is generic enough and can be reused
by another driver. Move it to a separate
On Mon, Oct 27, 2014 at 12:08 PM, Antonios Motakis
a.mota...@virtualopensystems.com wrote:
The virqfd_enable and virqfd_disable functions are now global. Add the
vfio_ prefix to those functions.
Wouldn't it be better to change the name *before* making them global?
Bjorn
On Wed, Oct 22, 2014 at 10:54 AM, Alexander Duyck
alexander.du...@gmail.com wrote:
On 10/21/2014 07:47 PM, Bjorn Helgaas wrote:
[+cc Joerg, Eric, Tom, David, iommu list]
On Wed, Oct 15, 2014 at 2:14 AM, Takao Indoh indou.ta...@jp.fujitsu.com
wrote:
(2014/10/14 18:34), Li, ZhenHua wrote:
I
On Wed, Oct 22, 2014 at 7:21 AM, Joerg Roedel j...@8bytes.org wrote:
Hi Bjorn,
On Tue, Oct 21, 2014 at 08:16:46PM -0600, Bjorn Helgaas wrote:
I was looking at Zhen-Hua's recent patches, trying to figure out if I
need to do anything with them. Resetting devices in the old kernel
seems like
On Wed, Oct 15, 2014 at 11:06:53AM +0800, Yijing Wang wrote:
Save msi chip in pci_sys_data instead of assign
msi chip to every pci bus in .add_bus().
Signed-off-by: Yijing Wang wangyij...@huawei.com
---
drivers/pci/host/pci-tegra.c | 13 +++--
1 files changed, 3 insertions(+),
On Wed, Oct 15, 2014 at 11:06:52AM +0800, Yijing Wang wrote:
Saving msi chip in pci_sys_data can make pci bus and
devices don't need to know msi chip detail, it also
make pci enumeration code be decoupled from msi chip.
In fact, all pci devices under the same pci hostbridge
share same msi
On Wed, Oct 15, 2014 at 11:06:57AM +0800, Yijing Wang wrote:
MSI chip will be saved in pci_sys_data, now we can
clean up pcibios_add_bus() and pcibios_remove_bus()
in arm, and use pci_find_msi_chip() to get msi chip
in core MSI code.
Signed-off-by: Yijing Wang wangyij...@huawei.com
---
On Wed, Oct 15, 2014 at 11:06:58AM +0800, Yijing Wang wrote:
Now msi chip is saved in pci_sys_data in arm,
we could clean the bus-msi assignment in
pci core.
Signed-off-by: Yijing Wang wangyij...@huawei.com
CC: Thierry Reding thierry.red...@gmail.com
CC: Thomas Petazzoni
On Wed, Oct 15, 2014 at 11:06:48AM +0800, Yijing Wang wrote:
Now there are a lot of weak arch functions in MSI code.
Thierry Reding Introduced MSI chip framework to configure MSI/MSI-X in arm,
that's a better solution than overriding lots of existing weak arch
functionsin.
This series use
[-cc Bill, +cc Zhen-Hua, Eric, Tom, Jerry]
Hi Joerg,
I was looking at Zhen-Hua's recent patches, trying to figure out if I
need to do anything with them. Resetting devices in the old kernel
seems like a non-starter. Resetting devices in the new kernel, ...,
well, maybe. It seems ugly, and it
[+cc Joerg, Eric, Tom, David, iommu list]
On Wed, Oct 15, 2014 at 2:14 AM, Takao Indoh indou.ta...@jp.fujitsu.com wrote:
(2014/10/14 18:34), Li, ZhenHua wrote:
I tested on the latest stable version 3.17, it works well.
On 10/10/2014 03:13 PM, Li, Zhen-Hua wrote:
On a HP system with Intel
[+cc Joerg, Suravee, Jay, iommu list, linux-pci]
On Wed, Oct 15, 2014 at 5:44 PM, Kallol Biswas nucleod...@gmail.com wrote:
Resending, as message got bounced for html content.
Hi,
PCIe has introduced PASID TLP Prefix. There are two ECNs on
a non-PCI tree, so:
Acked-by: Bjorn Helgaas bhelg...@google.com
Looks OK to me, but I expect you'll want Rafael's ack as well.
---
drivers/acpi/pci_root.c | 16 ++--
1 file changed, 14 insertions(+), 2 deletions(-)
diff --git a/drivers/acpi/pci_root.c b/drivers/acpi/pci_root.c
On Fri, Sep 05, 2014 at 06:09:45PM +0800, Yijing Wang wrote:
This series is based Bjorn's pci-next branch + Alexander Gordeev's two patches
Remove arch_msi_check_device() link: https://lkml.org/lkml/2014/7/12/41
Currently, there are a lot of weak arch functions in MSI code.
Thierry Reding
On Fri, Jul 11, 2014 at 12:19 AM, Jiang Liu jiang@linux.intel.com wrote:
Finally enhance pci_root driver to support DMAR device hotplug when
hot-plugging PCI host bridges.
Signed-off-by: Jiang Liu jiang@linux.intel.com
Acked-by: Bjorn Helgaas bhelg...@google.com
I assume you'll merge
On Thu, Jul 10, 2014 at 4:11 AM, Alexander Gordeev agord...@redhat.com wrote:
On Wed, Jul 09, 2014 at 10:06:48AM -0600, Bjorn Helgaas wrote:
Out of curiosity, do you have a pointer to this? It looks like it
I.e. ICH8 chapter 12.1.30 or ICH10 chapter 14.1.27
uses one vector per port, and I'm
On Tue, Jul 8, 2014 at 6:26 AM, Alexander Gordeev agord...@redhat.com wrote:
On Mon, Jul 07, 2014 at 01:40:48PM -0600, Bjorn Helgaas wrote:
Can you quantify the benefit of this? Can't a device already use
MSI-X to request exactly the number of vectors it can use? (I know
A Intel AHCI
On Fri, Jul 4, 2014 at 2:58 AM, Alexander Gordeev agord...@redhat.com wrote:
On Thu, Jul 03, 2014 at 09:20:52AM +, David Laight wrote:
From: Bjorn Helgaas
On Tue, Jun 10, 2014 at 03:10:30PM +0200, Alexander Gordeev wrote:
There are PCI devices that require a particular value written
On Fri, Jul 4, 2014 at 2:57 AM, Alexander Gordeev agord...@redhat.com wrote:
On Wed, Jul 02, 2014 at 02:22:01PM -0600, Bjorn Helgaas wrote:
On Tue, Jun 10, 2014 at 03:10:30PM +0200, Alexander Gordeev wrote:
There are PCI devices that require a particular value written
to the Multiple Message
On Tue, Jun 10, 2014 at 03:10:30PM +0200, Alexander Gordeev wrote:
There are PCI devices that require a particular value written
to the Multiple Message Enable (MME) register while aligned on
power of 2 boundary value of actually used MSI vectors 'nvec'
is a lesser of that MME value:
iommu/vt-d: match segment number when searching for dev_iotlb capable
devices
iommu/vt-d: use correct domain id to flush virtual machine domains
iommu/vt-d: introduce helper functions to improve code readability
iommu/vt-d: introduce helper functions to make code symmetric for
On Thu, May 22, 2014 at 05:07:55PM -0600, Alex Williamson wrote:
Several Marvell devices and a JMicron device have a similar DMA
requester ID problem to Ricoh, except they use function 1 as the
PCIe requester ID. Add a quirk for these to populate the DMA
function alias bitmap.
What's the DMA
On Thu, May 22, 2014 at 05:08:01PM -0600, Alex Williamson wrote:
Several PCIe-to-PCI bridges fail to provide a PCIe capability, causing
us to handle them as conventional PCI devices. In some cases, this
may be correct, in others it's not. Add a dev_flag bit to identify
devices to be handled
there's
PCI stuff at the beginning and end, here's my ack for the PCI bits (patches
1-7 and 15-16):
Acked-by: Bjorn Helgaas bhelg...@google.com
If you want to send me updated changelogs for patches 5 6, I'll drop
those in.
Didn't you have more testing reports? I see George's, but I thought
On Tue, May 20, 2014 at 08:53:21AM -0600, Alex Williamson wrote:
The driver_override field allows us to specify the driver for a device
rather than relying on the driver to provide a positive match of the
device. This shortcuts the existing process of looking up the vendor
and device ID,
On Tue, Apr 22, 2014 at 03:07:28PM +0800, Jiang Liu wrote:
Finally enhance pci_root driver to support DMAR device hotplug when
hot-plugging PCI host bridges.
Signed-off-by: Jiang Liu jiang@linux.intel.com
---
drivers/acpi/pci_root.c | 16 ++--
1 file changed, 14
On Thu, Apr 10, 2014 at 2:46 AM, Woodhouse, David
david.woodho...@intel.com wrote:
DMAR:[fault reason 02] Present bit in context entry is clear
dmar: DRHD: handling fault status reg 602
dmar: DMAR:[DMA Read] Request device [02:00.0] fault addr
7f61e000
That
[subject changed]
On Thu, Apr 10, 2014 at 2:45 PM, scame...@beardog.cce.hp.com wrote:
On Wed, Apr 09, 2014 at 11:32:37PM -0700, Davidlohr Bueso wrote:
On Wed, 2014-04-09 at 22:03 -0600, Bjorn Helgaas wrote:
[+cc Joerg, iommu list]
On Wed, Apr 9, 2014 at 6:19 PM, Davidlohr Bueso davidl
[+cc Joerg, iommu list]
On Wed, Apr 9, 2014 at 6:19 PM, Davidlohr Bueso davidl...@hp.com wrote:
On Wed, 2014-04-09 at 16:50 -0700, James Bottomley wrote:
On Wed, 2014-04-09 at 16:40 -0700, Davidlohr Bueso wrote:
On Wed, 2014-04-09 at 16:10 -0700, James Bottomley wrote:
On Wed, 2014-04-09
On Thu, Apr 3, 2014 at 8:51 PM, Alex Williamson
alex.william...@redhat.com wrote:
On Thu, 2014-04-03 at 15:48 -0600, Bjorn Helgaas wrote:
[+cc George]
On Fri, Aug 2, 2013 at 10:59 AM, Alex Williamson
alex.william...@redhat.com wrote:
...
Great! I'm still trying to figure out how
[+cc George]
On Fri, Aug 2, 2013 at 10:59 AM, Alex Williamson
alex.william...@redhat.com wrote:
...
Great! I'm still trying to figure out how to handle the quirk around
Intel PCI-to-PCI bridge on the root complex as just another quirk. I
respin another version once I have that worked out.
On Tue, Feb 18, 2014 at 1:59 PM, Bjorn Helgaas bhelg...@google.com wrote:
This is v2 of my rework of part of Stephen's patch [1]. My v1 posting,
with a little discussion, is here [2].
This removes SR-IOV migration support, which seems to be unused.
Changes since v1:
- Drop the removal
On Wed, Feb 19, 2014 at 1:29 AM, Winkler, Tomas tomas.wink...@intel.com wrote:
We currently include linux/irqreturn.h in linux/pci.h, but I'm about to
remove that from linux/pci.h, so add explicit includes where needed.
Signed-off-by: Bjorn Helgaas bhelg...@google.com
---
drivers/misc
/20131227132710.71906...@nehalam.linuxnetplumber.net
[2]
https://lkml.kernel.org/r/20140130192011.25426.45702.st...@bhelgaas-glaptop.roam.corp.google.com
---
Bjorn Helgaas (4):
misc: mic: Add include of linux/irqreturn.h
mei: Add include of linux/irqreturn.h
iommu/amd: Add include
We currently include linux/irqreturn.h in linux/pci.h, but I'm about to
remove that from linux/pci.h, so add explicit includes where needed.
Signed-off-by: Bjorn Helgaas bhelg...@google.com
---
drivers/misc/mic/card/mic_device.h |1 +
drivers/misc/mic/host/mic_device.h |1 +
2 files
We currently include linux/irqreturn.h in linux/pci.h, but I'm about to
remove that from linux/pci.h, so add explicit includes where needed.
Signed-off-by: Bjorn Helgaas bhelg...@google.com
---
drivers/iommu/amd_iommu_types.h |1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/iommu
on Stephen Hemminger's patch (see link below), but goes a bit
further.
Link:
http://lkml.kernel.org/r/20131227132710.71906...@nehalam.linuxnetplumber.net
Signed-off-by: Bjorn Helgaas bhelg...@google.com
CC: Stephen Hemminger step...@networkplumber.org
---
Documentation/PCI/pci-iov-howto.txt
[+cc Alex]
On Sun, Dec 8, 2013 at 7:26 AM, Antonio Quartulli
anto...@meshcoding.com wrote:
On 29/05/12 10:56, Antonio Quartulli wrote:
On Tue, May 29, 2012 at 10:35:53 +0200, Joerg Roedel wrote:
Hi Antonio,
On Sat, May 26, 2012 at 09:09:52AM -0600, Bjorn Helgaas wrote:
On Sat, May 26, 2012
On Tue, Nov 19, 2013 at 10:47:05AM +0530, Bharat Bhushan wrote:
In Aperture type of IOMMU (like FSL PAMU), VFIO-iommu system need to know
the MSI region to map its window in h/w. This patch just defines the
required weak functions only and will be used by followup patches.
Signed-off-by:
On Thu, Nov 7, 2013 at 8:40 PM, Yijing Wang wangyij...@huawei.com wrote:
HI Bjorn,
Thanks for your review and comments very much!
+list_for_each_entry(dmar_dev, head, list)
+if (dmar_dev-segment == pci_domain_nr(dev-bus)
+ dmar_dev-bus
On Sun, Oct 13, 2013 at 02:02:32AM +0530, Varun Sethi wrote:
Factor out PCI specific code in the PAMU driver.
Signed-off-by: Varun Sethi varun.se...@freescale.com
---
drivers/iommu/fsl_pamu_domain.c | 81
+++
1 file changed, 40 insertions(+), 41
On Thu, Oct 3, 2013 at 11:19 PM, Bhushan Bharat-R65777
r65...@freescale.com wrote:
I don't know enough about VFIO to understand why these new interfaces are
needed. Is this the first VFIO IOMMU driver? I see vfio_iommu_spapr_tce.c
and
vfio_iommu_type1.c but I don't know if they're
- u32 msiir_offset; /* Offset of MSIIR, relative to start of CCSR */
+ dma_addr_t msiir; /* MSIIR Address in CCSR */
Are you sure dma_addr_t is right here, versus phys_addr_t? It implies
that it's the output of the DMA API, but I don't think the DMA API is
used in the MSI driver.
On Thu, Sep 19, 2013 at 12:59:17PM +0530, Bharat Bhushan wrote:
This patch adds interface to get following information
- Number of MSI regions (which is number of MSI banks for powerpc).
- Get the region address range: Physical page which have the
address/addresses used for generating
[+cc Rafael, linux-acpi]
On Tue, Jul 30, 2013 at 6:35 PM, Takao Indoh indou.ta...@jp.fujitsu.com wrote:
On x86, currently IOMMU initialization run *after* PCI enumeration, but
what you are talking about is that it should be changed so that x86
IOMMU initialization is done *before* PCI
On Mon, Jul 29, 2013 at 10:06 AM, Alex Williamson
alex.william...@redhat.com wrote:
On Fri, 2013-07-26 at 15:54 -0600, Bjorn Helgaas wrote:
On Thu, Jul 25, 2013 at 11:56:56AM -0600, Alex Williamson wrote:
The most closely associated device idea seems confusing to
describe and think about. I
On Thu, Jul 25, 2013 at 02:25:04PM -0400, Don Dutile wrote:
On 07/25/2013 01:19 PM, Bjorn Helgaas wrote:
On Wed, Jul 24, 2013 at 04:42:03PM -0400, Don Dutile wrote:
On 07/23/2013 06:35 PM, Bjorn Helgaas wrote:
On Thu, Jul 11, 2013 at 03:03:27PM -0600, Alex Williamson wrote
On Thu, Jul 25, 2013 at 11:56:56AM -0600, Alex Williamson wrote:
On Wed, 2013-07-24 at 17:24 -0600, Bjorn Helgaas wrote:
On Wed, Jul 24, 2013 at 12:12:28PM -0600, Alex Williamson wrote:
On Wed, 2013-07-24 at 10:47 -0600, Bjorn Helgaas wrote:
On Tue, Jul 23, 2013 at 5:21 PM, Alex
On Wed, Jul 24, 2013 at 12:29 AM, Takao Indoh
indou.ta...@jp.fujitsu.com wrote:
Sorry for letting this discussion slide, I was busy on other works:-(
Anyway, the summary of previous discussion is:
- My patch adds new initcall(fs_initcall) to reset all PCIe endpoints on
boot. This expects PCI
On Wed, Jul 24, 2013 at 04:42:03PM -0400, Don Dutile wrote:
On 07/23/2013 06:35 PM, Bjorn Helgaas wrote:
On Thu, Jul 11, 2013 at 03:03:27PM -0600, Alex Williamson wrote:
This provides interfaces for drivers to discover the visible PCIe
requester ID for a device, for things like IOMMU setup
On Tue, Jul 23, 2013 at 5:21 PM, Alex Williamson
alex.william...@redhat.com wrote:
On Tue, 2013-07-23 at 16:35 -0600, Bjorn Helgaas wrote:
On Thu, Jul 11, 2013 at 03:03:27PM -0600, Alex Williamson wrote:
This provides interfaces for drivers to discover the visible PCIe
requester ID
On Wed, Jul 24, 2013 at 12:12:28PM -0600, Alex Williamson wrote:
On Wed, 2013-07-24 at 10:47 -0600, Bjorn Helgaas wrote:
On Tue, Jul 23, 2013 at 5:21 PM, Alex Williamson
alex.william...@redhat.com wrote:
On Tue, 2013-07-23 at 16:35 -0600, Bjorn Helgaas wrote:
On Thu, Jul 11, 2013 at 03
On Tue, Jul 16, 2013 at 8:21 PM, Myron Stowe myron.st...@gmail.com wrote:
Linux Plumbers has approved an ACPI/PM, PCI microconference. The
overview page is here:
http://wiki.linuxplumbersconf.org/2013:pci_subsystem
We would like to start receiving volunteers for presenting topics of
step.
requestee doesn't make sense to me. The -ee suffix added to a verb
normally makes a noun that refers to the object of the action. So
requestee sounds like it means something like target or responder,
but that's not what you mean here.
Suggested-by: Bjorn Helgaas bhelg...@google.com
On Tue, Jul 9, 2013 at 12:27 PM, Alex Williamson
alex.william...@redhat.com wrote:
On Mon, 2013-07-08 at 15:51 -0600, Bjorn Helgaas wrote:
On Mon, Jul 08, 2013 at 02:49:16PM -0600, Alex Williamson wrote:
On Mon, 2013-07-08 at 13:34 -0600, Bjorn Helgaas wrote:
On Mon, Jul 08, 2013 at 11:07
possible requester ID the
IOMMU might see, PCI could provide an iterator
(pci_for_each_requester_id()) to do that.
Bjorn
commit afad51492c6672b96c2b0735600d5695e30f7180
Author: Bjorn Helgaas bhelg...@google.com
Date: Wed Jul 3 16:04:26 2013 -0600
pci-add-for-each-requester-id
diff --git
On Mon, Jul 08, 2013 at 02:49:16PM -0600, Alex Williamson wrote:
On Mon, 2013-07-08 at 13:34 -0600, Bjorn Helgaas wrote:
On Mon, Jul 08, 2013 at 11:07:20AM -0600, Alex Williamson wrote:
Joerg,
Where do we stand on this series? You had a concern that the heuristic
used in patch 1
On Wed, Jun 26, 2013 at 12:45 PM, Alex Williamson
alex.william...@redhat.com wrote:
On Tue, 2013-06-25 at 22:20 -0600, Bjorn Helgaas wrote:
On Thu, Jun 20, 2013 at 10:15 AM, Joerg Roedel j...@8bytes.org wrote:
On Thu, Jun 20, 2013 at 09:44:51AM -0600, Alex Williamson wrote:
On Thu, 2013-06
On Thu, Jun 20, 2013 at 10:15 AM, Joerg Roedel j...@8bytes.org wrote:
On Thu, Jun 20, 2013 at 09:44:51AM -0600, Alex Williamson wrote:
On Thu, 2013-06-20 at 15:59 +0200, Joerg Roedel wrote:
On Tue, May 28, 2013 at 12:40:20PM -0600, Alex Williamson wrote:
+ if (!pci_is_root_bus(pdev-bus)) {
On Fri, May 10, 2013 at 3:18 PM, Alex Williamson
alex.william...@redhat.com wrote:
These will replace pci_find_upstream_pcie_bridge, which is difficult
to use and rather specific to intel-iommu usage. A quirked
pci_is_pcie_bridge function is provided to work around non-compliant
PCIe-to-PCI
On Mon, Apr 15, 2013 at 8:58 AM, Joerg Roedel j...@8bytes.org wrote:
On Mon, Apr 15, 2013 at 12:42:00AM +0530, Varun Sethi wrote:
swap_pci_ref function is used by the IOMMU API code for swapping pci device
pointers, while determining the iommu group for the device.
Currently this function was
On Mon, Apr 15, 2013 at 1:12 PM, Alex Williamson
alex.william...@redhat.com wrote:
On Thu, 2013-04-11 at 11:23 -0600, Bjorn Helgaas wrote:
On Wed, Apr 10, 2013 at 6:01 PM, Alex Williamson
alex.william...@redhat.com wrote:
On Wed, 2013-04-10 at 16:36 -0600, Bjorn Helgaas wrote:
On Wed, Feb
On Thu, Apr 4, 2013 at 9:39 AM, Neil Horman nhor...@tuxdriver.com wrote:
On Thu, Apr 04, 2013 at 08:57:06AM -0600, Bjorn Helgaas wrote:
On Thu, Apr 4, 2013 at 8:50 AM, Neil Horman nhor...@tuxdriver.com wrote:
On Thu, Apr 04, 2013 at 03:27:29PM +0100, David Woodhouse wrote:
On Wed, 2013-04-03
On Thu, Mar 7, 2013 at 7:35 PM, Andrew Cooks aco...@gmail.com wrote:
This patch creates a quirk to allow the Intel IOMMU to be enabled for devices
that use incorrect tags during DMA. It is similar to the quirk for Ricoh
devices, but allows mapping multiple functions and mapping of 'ghost'
On Thu, Apr 4, 2013 at 11:51 AM, Neil Horman nhor...@tuxdriver.com wrote:
Oh, you want the bug report that I'm fixing this against? Sure, I can do
that.
I thought you wanted me to include a url in the WARN_TAINT, with which user
could report occurances of this bug. Yeah, the bug that this
that their systems are vulnurable to this problem.
Signed-off-by: Neil Horman nhor...@tuxdriver.com
CC: Prarit Bhargava pra...@redhat.com
CC: Don Zickus dzic...@redhat.com
CC: Don Dutile ddut...@redhat.com
CC: Bjorn Helgaas bhelg...@google.com
CC: Asit Mallick asit.k.mall...@intel.com
CC: linux
On Wed, Feb 27, 2013 at 5:06 PM, Shuah Khan shuah.k...@hp.com wrote:
pci defines PCI_DEVFN(), PCI_SLOT(), and PCI_FUNC() interfaces, however,
it doesn't have interfaces to return PCI bus and PCI device id. Drivers
(AMD IOMMU, and AER) have module specific definitions for PCI_BUS() and
On Mon, Feb 25, 2013 at 9:37 AM, Shuah Khan shuah.k...@hp.com wrote:
On Wed, 2013-02-20 at 18:19 -0700, Bjorn Helgaas wrote:
On Mon, Feb 11, 2013 at 4:00 PM, Shuah Khan shuah.k...@hp.com wrote:
pci defines PCI_DEVFN(), PCI_SLOT(), and PCI_FUNC() interfaces, however,
it doesn't have
On Mon, Feb 11, 2013 at 4:00 PM, Shuah Khan shuah.k...@hp.com wrote:
pci defines PCI_DEVFN(), PCI_SLOT(), and PCI_FUNC() interfaces, however,
it doesn't have interfaces to return PCI bus and PCI device id. Drivers
(AMD IOMMU, and AER) implement module specific definitions for PCI_BUS()
and
[+cc Jeff, linux-ide, David, Joerg, iommu]
On Thu, Nov 29, 2012 at 7:39 PM, Robert Hancock hancock...@gmail.com wrote:
On Thu, Nov 29, 2012 at 12:16 PM, Bjorn Helgaas bhelg...@google.com wrote:
On Thu, Nov 29, 2012 at 1:55 AM, Justin Piszcz jpis...@lucidpixels.com
wrote:
-Original
On Mon, Jun 11, 2012 at 8:37 AM, Alex Williamson
alex.william...@redhat.com wrote:
On Wed, 2012-06-06 at 13:05 +0200, Joerg Roedel wrote:
On Wed, May 30, 2012 at 02:18:29PM -0600, Alex Williamson wrote:
v2:
- Trickle down changes from pci_get_dma_source() to better handle
PCI device
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