OMMU is
> disabled
> iommu/amd: Keep track of amd_iommu_irq_remap state
Series are Acked-by: Huang Rui
>
> drivers/iommu/amd/init.c | 36
> 1 file changed, 20 insertions(+), 16 deletions(-)
>
> --
> 2.30.2
>
On Tue, Mar 16, 2021 at 11:00:26PM +0800, Joerg Roedel wrote:
> On Tue, Mar 16, 2021 at 09:36:02PM +0800, Huang Rui wrote:
> > Thanks for the comments. Could you please elaborate this?
> >
> > Do you mean while amd_iommu=off, we won't prepare the IVRS, and even
> >
On Tue, Mar 16, 2021 at 09:16:34PM +0800, Joerg Roedel wrote:
> Hi Huang,
>
> On Thu, Mar 11, 2021 at 10:28:07PM +0800, Huang Rui wrote:
> > diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c
> > index f0adbc48fd17..a08e885403b7 100644
> > --- a/drivers/
n Du
Signed-off-by: Huang Rui
Cc: Joerg Roedel
Cc: Suravee Suthikulpanit
Cc: Alex Deucher
Cc: sta...@vger.kernel.org
---
drivers/iommu/amd/iommu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c
index f0adbc48fd17..a08
ow as possible.
Yes, besides the comments from Alex and Felix, may we get your firmware
version (SMC firmware which is from SBIOS) and device id?
> >>>| [drm:amdgpu_job_timedout [amdgpu]] *ERROR* ring gfx timeout,
> >>> signaled seq=1, emitted seq=3
It looks only gfx ib
should be issued one COMPLETE_WAIT additionally to wait
all older commands completed. Then the left space should be increased
after IOMMU fetching from cmd buf.
So left check value should be left <= 0x20 (two commands).
Signed-off-by: Huang Rui <ray.hu...@amd.com>
---
Hi Joerg,
Th
On Fri, Dec 04, 2015 at 09:59:28AM +, G Gregory wrote:
> On 4 December 2015 at 09:42, Hanjun Guo <guohan...@huawei.com> wrote:
> > On 2015/12/4 17:17, Huang Rui wrote:
> >> On Fri, Dec 04, 2015 at 10:50:23AM +0200, Mika Westerberg wrote:
> >>> On Fri, De
