On Thu, Mar 15, 2018 at 12:15 AM, Robin Murphy wrote:
> On 12/03/18 07:03, Jitendra Bhivare wrote:
>>
>> On Tue, Mar 6, 2018 at 5:12 PM, Robin Murphy wrote:
>>>
>>> On 06/03/18 04:59, Jitendra Bhivare wrote:
With SoC wide DMA mask of
On Tue, Mar 6, 2018 at 5:17 PM, Robin Murphy wrote:
> On 06/03/18 04:59, Jitendra Bhivare wrote:
>>
>> iPROC SoC has a special device window to treat GICv3 ITS MSI.
>
>
> Ugh, really? After preferably printing out 100 copies of the SBSA, binding
> them all together and
On Tue, Mar 6, 2018 at 5:12 PM, Robin Murphy wrote:
> On 06/03/18 04:59, Jitendra Bhivare wrote:
>>
>> With SoC wide DMA mask of 40-bit, the mappings for entire IOVA space can't
>> be specified in the PAXBv2 PCIe RC of SoC. The holes in IOVA space needs
>> to
>> be reserved
On Tue, Mar 6, 2018 at 5:11 PM, Robin Murphy wrote:
>
> On 06/03/18 04:59, Jitendra Bhivare wrote:
>>
>> Certain regions in IO virtual address space may need to be reserved to be
>> not used for devices configured behind IOMMU.
>>
>> Add documentation of the property to
On Tue, Mar 6, 2018 at 5:11 PM, Robin Murphy wrote:
> On 06/03/18 04:59, Jitendra Bhivare wrote:
>
>> Certain regions in IO virtual address space may need to be reserved to be
>> not used for devices configured behind IOMMU.
>>
>> Add documentation of the property to allow
Current ARM SMMU virtualizes MSI addresses to IOVA space.
In iProc SoCs, MSI needs to be steered. Allow reserving MSI address range
using DT node entry as direct region.
Signed-off-by: Jitendra Bhivare
---
drivers/iommu/arm-smmu.c | 14 +-
1 file
ARM SoCs need a way to reserve IOMMU regions. Some address ranges used
by devices sitting behind IOMMU are treated specially. To prevent these
ranges from getting mapped in IOVA space, use the existing framework and
code to reserve the ranges using DT properties.
This patch set is created
With SoC wide DMA mask of 40-bit, the mappings for entire IOVA space can't
be specified in the PAXBv2 PCIe RC of SoC. The holes in IOVA space needs to
be reserved to prevent any IOVA allocations in those spaces.
reserved-dma-region property is added to specify the ranges which should
never be
iPROC SoC provides restricted windows to access sparsed memory as per ARM
memory map to the devices sitting behind IOMMU. The windows cover enough
DDR space but not the entire 40-bit 1TB space used by IOMMU code as per
the DMA mask set.
Current IOMMU code does not provide a hook to reserve these
iPROC SoC has a special device window to treat GICv3 ITS MSI.
Current code maps MSI to IOVA space. Add SMMU node property to use
direct mappings for MSI region.
This property is read and reserved when arm_smmu_get_resv_regions
gets called.
Signed-off-by: Jitendra Bhivare
Certain regions in IO virtual address space may need to be reserved to be
not used for devices configured behind IOMMU.
Add documentation of the property to allow such regions to be specified in
DT to be reserved using IOMMU_RESV_RESERVED type.
Reviewed-by: Ray Jui
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