On 06/07/2022 16:38, Krzysztof Kozlowski wrote:
On 06/07/2022 15:48, Matthias Brugger wrote:
On 04/07/2022 14:36, Krzysztof Kozlowski wrote:
On 04/07/2022 12:00, Tinghan Shen wrote:
The max clock items for the dts node with compatible
'mediatek,mt8195-smi-sub-common' should be 3
On 04/07/2022 14:36, Krzysztof Kozlowski wrote:
On 04/07/2022 12:00, Tinghan Shen wrote:
The max clock items for the dts node with compatible
'mediatek,mt8195-smi-sub-common' should be 3.
However, the dtbs_check of such node will get following message,
On 04/07/2022 14:38, Krzysztof Kozlowski wrote:
On 04/07/2022 12:00, Tinghan Shen wrote:
Add power domains controller node for mt8195.
Signed-off-by: Weiyi Lu
Signed-off-by: Tinghan Shen
---
arch/arm64/boot/dts/mediatek/mt8195.dtsi | 327 +++
1 file changed, 327
Hi Joerg,
On 22/06/2022 15:44, Joerg Roedel wrote:
On Thu, Jun 16, 2022 at 01:08:25PM +0200, AngeloGioacchino Del Regno wrote:
AngeloGioacchino Del Regno (5):
dt-bindings: iommu: mediatek: Add mediatek,infracfg phandle
iommu/mediatek: Lookup phandle to retrieve syscon to infracfg
Hi Joerg,
On 22/06/2022 15:44, Joerg Roedel wrote:
On Thu, Jun 16, 2022 at 01:08:25PM +0200, AngeloGioacchino Del Regno wrote:
AngeloGioacchino Del Regno (5):
dt-bindings: iommu: mediatek: Add mediatek,infracfg phandle
iommu/mediatek: Lookup phandle to retrieve syscon to infracfg
On 15/06/2022 14:28, AngeloGioacchino Del Regno wrote:
Il 15/06/22 14:09, Matthias Brugger ha scritto:
On 09/06/2022 12:08, AngeloGioacchino Del Regno wrote:
On some SoCs (of which only MT8195 is supported at the time of writing),
the "R" and "W" (I/O) enable
On 16/06/2022 07:42, Yong Wu wrote:
Just remove a unused variable that only is for mtk_iommu_v1.
Fixes: 9485a04a5bb9 ("iommu/mediatek: Separate mtk_iommu_data for v1 and v2")
It does not fix a bug, so no fixes tag here needed.
With that:
Reviewed-by: Matthias Brugger
On 16/06/2022 07:42, Yong Wu wrote:
The mtk_iommu_mm_dts_parse will parse the smi larbs nodes. if the i+1
larb is parsed fail(return -EINVAL), we should of_node_put for the 0..i
larbs. In the fail path, one of_node_put matches with of_parse_phandle in
it.
Fixes: d2e9a1102cfc
Signed-off-by: Yong Wu
Reviewed-by: AngeloGioacchino Del Regno
Reviewed-by: Guenter Roeck
Reviewed-by: Matthias Brugger
---
drivers/iommu/mtk_iommu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
index bb9dd92c9898..3b
ove code readability.
Signed-off-by: AngeloGioacchino Del Regno
Reviewed-by: Matthias Brugger
---
drivers/iommu/mtk_iommu.c | 12 +---
1 file changed, 5 insertions(+), 7 deletions(-)
diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
index 90685946fcbe..b2ae84046
and MT8173.
Signed-off-by: AngeloGioacchino Del Regno
Reviewed-by: Matthias Brugger
---
.../bindings/iommu/mediatek,iommu.yaml | 17 +
1 file changed, 17 insertions(+)
diff --git a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
b/Documentation/devicetre
On 09/06/2022 12:08, AngeloGioacchino Del Regno wrote:
On some SoCs (of which only MT8195 is supported at the time of writing),
the "R" and "W" (I/O) enable bits for the IOMMUs are in the pericfg_ao
register space and not in the IOMMU space: as it happened already with
infracfg, it is
nfra IOMMU.
Signed-off-by: AngeloGioacchino Del Regno
Reviewd-by: Matthias Brugger
---
.../devicetree/bindings/iommu/mediatek,iommu.yaml | 14 ++
1 file changed, 14 insertions(+)
diff --git a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
b/Documentation/devicetre
to infracfg's regmap through a
new "mediatek,infracfg" phandle.
In order to keep retrocompatibility with older devicetrees, the old
way is kept in place.
Signed-off-by: AngeloGioacchino Del Regno
Reviewed-by: Matthias Brugger
---
drivers/iommu/mtk_io
On 18/05/2022 12:04, AngeloGioacchino Del Regno wrote:
Add properties "mediatek,infracfg" and "mediatek,pericfg" to let the
mtk_iommu driver retrieve phandles to the infracfg and pericfg syscon(s)
instead of performing a per-soc compatible lookup.
Signed-off-by: AngeloGioacchino Del Regno
ser will take action.
Signed-off-by: AngeloGioacchino Del Regno
Reviewed-by: Matthias Brugger
---
drivers/iommu/mtk_iommu.c | 26 --
1 file changed, 16 insertions(+), 10 deletions(-)
diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
index cfaaa9
On 17/05/2022 15:21, AngeloGioacchino Del Regno wrote:
Add property "mediatek,infracfg" to let the mtk_iommu driver retrieve
a phandle to the infracfg syscon instead of performing a per-soc
compatible lookup.
Signed-off-by: AngeloGioacchino Del Regno
---
On 17/05/2022 11:26, AngeloGioacchino Del Regno wrote:
Il 17/05/22 11:08, Yong Wu ha scritto:
On Fri, 2022-05-13 at 17:14 +0200, AngeloGioacchino Del Regno wrote:
Add support for the M4Us found in the MT6795 Helio X10 SoC.
Signed-off-by: AngeloGioacchino Del Regno <
be helpful for maintainer to
apply.
For the whole series:
Reviewed-by: Matthias Brugger
v6:
https://lore.kernel.org/linux-iommu/20220407075726.17771-1-yong...@mediatek.com/
Rebase on v5.18-rc1.
v5:
https://lore.kernel.org/linux-iommu/20220217113453.13658-1-yong...@mediatek.com
1
On 07/04/2022 09:57, Yong Wu wrote:
Add a new flag NON_STD_AXI, All the previous SoC support this flag.
Prepare for adding infra and apu iommu which don't support this.
Signed-off-by: Yong Wu
Reviewed-by: AngeloGioacchino Del Regno
---
drivers/iommu/mtk_iommu.c | 16 ++--
1
On 07/04/2022 09:57, Yong Wu wrote:
Add IOMMU_TYPE definition. In the mt8195, we have another IOMMU_TYPE:
infra iommu, also there will be another APU_IOMMU, thus, use 2bits for the
IOMMU_TYPE.
Signed-off-by: Yong Wu
Reviewed-by: AngeloGioacchino Del Regno
---
drivers/iommu/mtk_iommu.c |
On 07/04/2022 09:57, Yong Wu wrote:
We preassign some ports in a special bank via the new defined
banks_portmsk. Put it in the plat_data means it is not expected to be
adjusted dynamically.
If the iommu id in the iommu consumer's dtsi node is inside this
banks_portmsk, then we switch it to
On 23/02/2022 08:24, Yong Wu wrote:
Add mt8186 iommu supports.
Signed-off-by: Anan Sun
Signed-off-by: Yong Wu
Reviewed-by: Matthias Brugger
---
drivers/iommu/mtk_iommu.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu
On 23/02/2022 08:24, Yong Wu wrote:
Add mt8186 iommu binding. "-mm" means the iommu is for Multimedia.
Signed-off-by: Yong Wu
Acked-by: Krzysztof Kozlowski
Reviewed-by: Rob Herring
Reviewed-by: Matthias Brugger
---
.../bindings/iommu/mediatek,iommu.yaml| 4
On 28/01/2022 13:45, Mauro Carvalho Chehab wrote:
Em Fri, 28 Jan 2022 13:40:55 +0100
Mauro Carvalho Chehab escreveu:
Hi Matthias/Yong,
Are you ok if this patch gets merged via the media tree together with the
remaining series, or do you prefer to apply it via SoC tree instead?
Same
On 17/01/2022 11:27, AngeloGioacchino Del Regno wrote:
Il 17/01/22 08:04, Yong Wu ha scritto:
MediaTek IOMMU block diagram always like below:
M4U
|
smi-common
|
-
| | ...
| |
larb1 larb2
| |
vdec
Hi Hans,
On 13/01/2022 11:15, Hans Verkuil wrote:
On 13/01/2022 11:11, AngeloGioacchino Del Regno wrote:
Il 11/01/22 11:57, AngeloGioacchino Del Regno ha scritto:
Il 12/11/21 11:55, Yong Wu ha scritto:
After this patchset, mtk_vcodec_release_enc_pm has only one line.
then remove that
On 10/06/2021 14:02, Yong Wu wrote:
> On Thu, 2021-06-10 at 09:53 +0200, Matthias Brugger wrote:
>> Hi Yong,
>>
>> On 12/05/2021 14:29, Yong Wu wrote:
>>> On Wed, 2021-05-12 at 17:20 +0800, Hsin-Yi Wang wrote:
>>>> On Sat, Apr 10, 2021 at 5:14 PM Yong
Hi Yong,
On 12/05/2021 14:29, Yong Wu wrote:
> On Wed, 2021-05-12 at 17:20 +0800, Hsin-Yi Wang wrote:
>> On Sat, Apr 10, 2021 at 5:14 PM Yong Wu wrote:
>>>
>>> MediaTek IOMMU has already added the device_link between the consumer
>>> and smi-larb device. If the vcodec device call the
On 10/04/2021 11:11, Yong Wu wrote:
> After adding device_link between the iommu consumer and smi-larb,
> the pm_runtime_get(_sync) of smi-larb and smi-common will be called
> automatically. we can get rid of mtk_smi_larb_get/put.
>
> CC: Matthias Brugger
> Signed-off-by: Y
On 10/04/2021 11:11, Yong Wu wrote:
> pm_runtime_get_sync will increment pm usage counter even it failed.
> This patch use pm_runtime_resume_and_get instead of pm_runtime_get
> to keep usage counter balanced.
>
> Signed-off-by: Yong Wu
Reviewed-by: Matthias Brugger
> ---
On 10/04/2021 11:11, Yong Wu wrote:
> pm_runtime_get_sync will increment pm usage counter even it failed.
> This patch use pm_runtime_resume_and_get instead of pm_runtime_get
> to keep usage counter balanced.
>
> CC: Xia Jiang
> Signed-off-by: Yong Wu
Reviewed-by
On 07/09/2020 12:16, Fabien Parent wrote:
Add a new flag in order to select which IVRP_PADDR format is used
by an SoC.
Signed-off-by: Fabien Parent
Reviewed-by: Yong Wu
Reviewed-by: Matthias Brugger
---
v4: no change
v3: set LEGACY_IVRP_PADDR as a flag instead of platform data
v2
default:
dev_err_ratelimited(dev->dev, "tx urb failed: %d\n",
urb->status);
- fallthrough;
- case 0:
break;
}
Reviewed-by: Matthias Brugger
On 27/08/2020 14:31, Frank Wunderlich wrote:
Tested full series on bananapi r2 (mt7623/mt2701, 5.9-rc1 + hdmi-patches),
works so far fbcon+x without issues
Tested-by: Frank Wunderlich
Thanks for testing.
Robin this is especially relevant for:
[PATCH 09/18] iommu/mediatek-v1: Add
Cc: Yong Wu
Cc: Yingjoe Chen
Cc: Christoph Hellwig
Cc: Rob Herring
Cc: Matthias Brugger
Signed-off-by: Miles Chen
Reviewed-by: Matthias Brugger
---
Change since v3
- use lore.kernel.org links
- move "change since..." after "---"
Change since v2:
- determi
ob Herring
Cc: Matthias Brugger
Signed-off-by: Miles Chen
The formating should look like this:
In previous discussion [1] and [2], we found that it is risky to
use max_pfn or totalram_pages to tell if 4GB mode is enabled.
Check 4GB mode by reading infracfg register, remove the usage
of the u
On 21/07/2020 13:24, Yong Wu wrote:
On Tue, 2020-07-21 at 11:40 +0200, Matthias Brugger wrote:
On 21/07/2020 04:16, Miles Chen wrote:
In previous discussion [1] and [2], we found that it is risky to
use max_pfn or totalram_pages to tell if 4GB mode is enabled.
Check 4GB mode by reading
/733
[2] https://lkml.org/lkml/2020/6/4/136
[3] https://lkml.org/lkml/2020/7/15/1147
Cc: Mike Rapoport
Cc: David Hildenbrand
Cc: Yong Wu
Cc: Yingjoe Chen
Cc: Christoph Hellwig
Cc: Yong Wu
Cc: Chao Hao
Cc: Rob Herring
Cc: Matthias Brugger
Signed-off-by: Miles Chen
---
drivers/iommu
On 02/07/2020 11:37, Miles Chen wrote:
In previous disscusion [1] and [2], we found that it is risky to
use max_pfn or totalram_pages to tell if 4GB mode is enabled.
Check 4GB mode by reading infracfg register, remove the usage
of the unexported symbol max_pfn.
[1]
On 13/07/2020 12:16, Joerg Roedel wrote:
From: Joerg Roedel
This fixes a compile error when cross-compiling the driver
on x86-32.
Signed-off-by: Joerg Roedel
Reviewed-by: Matthias Brugger
---
drivers/iommu/mtk_iommu.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers
On 11/07/2020 08:48, Yong Wu wrote:
Put all the macros about smi larb/port togethers, this is a preparing
patch for extending LARB_NR and adding new dom-id support.
Signed-off-by: Yong Wu
---
include/dt-bindings/memory/mt2712-larb-port.h | 2 +-
) in MMU_WR_LEN_CTRL register.
Cc: Matthias Brugger
Signed-off-by: Chao Hao
Reviewed-by: Matthias Brugger
---
drivers/iommu/mtk_iommu.c | 11 +++
drivers/iommu/mtk_iommu.h | 1 +
2 files changed, 12 insertions(+)
diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
index
e bit
> when setting F_MMU_TF_PROT_TO_PROGRAM_ADDR as otherwise the
> bit will be cleared and IOMMU performance will drop.
>
> Cc: Matthias Brugger
> Cc: Yong Wu
> Signed-off-by: Chao Hao
Reviewed-by: Matthias Brugger
> ---
> drivers/iommu/mtk_iommu.c | 8 +---
&
common_id above.
>
> We can also distinguish if the M4U HW has sub_common by HAS_SUB_COMM
> macro.
>
> Cc: Matthias Brugger
> Signed-off-by: Chao Hao
> Reviewed-by: Yong Wu
Reviewed-by: Matthias Brugger
> ---
> drivers/iommu/mtk_iommu.c | 21 ++---
&g
ands with
> higher priority. Otherwise the sending of write commands will be done in
> order. The feature is controlled by OUT_ORDER_WR_EN platform data flag.
>
> Cc: Matthias Brugger
> Suggested-by: Yong Wu
> Signed-off-by: Chao Hao
Reviewed-by: Matthias Brugger
> ---
> dr
and check for a flag present.
>> No functional change.
>>
>> Cc: Yong Wu
>> Suggested-by: Matthias Brugger
>> Signed-off-by: Chao Hao
>> Reviewed-by: Matthias Brugger
>> ---
>> drivers/iommu/mtk_iommu.c | 28 +---
>>
On 30/06/2020 12:59, chao hao wrote:
> On Mon, 2020-06-29 at 12:16 +0200, Matthias Brugger wrote:
>>
>> On 29/06/2020 09:13, Chao Hao wrote:
>>> Some platforms(ex: mt6779) need to improve performance by setting
>>> REG_MMU_WR_LEN register. And we can use WR_THRO
On 30/06/2020 12:53, chao hao wrote:
> On Mon, 2020-06-29 at 11:28 +0200, Matthias Brugger wrote:
>>
>> On 29/06/2020 09:13, Chao Hao wrote:
>>> Add F_MMU_IN_ORDER_WR_EN and F_MMU_STANDARD_AXI_MODE_BIT definition
>>> in MISC_CTRL register.
>>> F_
On 29/06/2020 09:13, Chao Hao wrote:
> 1. Start from mt6779, INVLDT_SEL move to offset=0x2c, so we add
>REG_MMU_INV_SEL_GEN2 definition and mt6779 uses it.
> 2. Add mt6779_data to support mm_iommu HW init.
>
> Cc: Yong Wu
> Cc: Matthias Brugger
> Signed-off-by
cleared and IOMMU
performance will drop.
> Suggested-by: Matthias Brugger
> Suggested-by: Yong Wu
> Signed-off-by: Chao Hao
> ---
> drivers/iommu/mtk_iommu.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/iommu/mtk_iommu.c b/dri
g mechanism(bit[5][21]=0) in MMU_WR_LEN_CTRL register.
>
> Cc: Matthias Brugger
> Signed-off-by: Chao Hao
> ---
> drivers/iommu/mtk_iommu.c | 10 ++
> drivers/iommu/mtk_iommu.h | 2 ++
> 2 files changed, 12 insertions(+)
>
> diff --git a/drivers/iommu/mtk_iommu
On 29/06/2020 09:13, Chao Hao wrote:
> Starting with mt6779, iommu needs to extend to 256 bytes from 128
> bytes which can send the max number of data for memory protection
> pa alignment. So we can use a separate patch to modify it.
>
> Suggested-by: Matthias Brugger
> S
ormal read command?
> F_MMU_IN_ORDER_WR_EN:
> If we set F_MMU_IN_ORDER_WR_EN(bit[1][17] = 0, out-of-order write), iommu
> will re-order write command and send more higher priority write command
> instead of sending write command in order. The feature be controlled
> by OUT_ORDER_EN macro defi
ested-by: Matthias Brugger
> Signed-off-by: Chao Hao
Reviewed-by: Matthias Brugger
> ---
> drivers/iommu/mtk_iommu.c | 23 ---
> drivers/iommu/mtk_iommu.h | 16 ++--
> 2 files changed, 22 insertions(+), 17 deletions(-)
>
> diff --git a/dr
On 19/06/2020 12:56, chao hao wrote:
> On Wed, 2020-06-17 at 11:22 +0200, Matthias Brugger wrote:
>>
>> On 17/06/2020 05:00, Chao Hao wrote:
>>> Some platforms(ex: mt6779) have a new register called by REG_MMU_WR_LEN
>>> to improve performance.
>>&g
On 18/06/2020 13:54, chao hao wrote:
> On Wed, 2020-06-17 at 11:33 +0200, Matthias Brugger wrote:
>>
>> On 17/06/2020 05:00, Chao Hao wrote:
>>> 1. Start from mt6779, INVLDT_SEL move to offset=0x2c, so we add
>>>REG_MMU_INV_SEL_GEN2 definition
On 17/06/2020 05:00, Chao Hao wrote:
> Add F_MMU_IN_ORDER_WR_EN definition in MISC_CTRL.
> In order to improve performance, we always disable STANDARD_AXI_MODE
> and IN_ORDER_WR_EN in MISC_CTRL.
>
> Change since v3:
The changelog should go below the '---' as we don't want this in the git
On 17/06/2020 05:00, Chao Hao wrote:
> 1. Start from mt6779, INVLDT_SEL move to offset=0x2c, so we add
>REG_MMU_INV_SEL_GEN2 definition and mt6779 uses it.
> 2. Change PROTECT_PA_ALIGN from 128 byte to 256 byte.
> 3. For REG_MMU_CTRL_REG register, we only need to change bit[2:0],
>
On 17/06/2020 05:00, Chao Hao wrote:
> Some platforms(ex: mt6779) have a new register called by REG_MMU_WR_LEN
> to improve performance.
> This patch add this register definition.
Please be more specific what this register is about.
>
> Signed-off-by: Chao Hao
> ---
>
On 17/06/2020 05:00, Chao Hao wrote:
> The max larb number that a iommu HW support is 8(larb0~larb7 in the below
> diagram).
> If the larb's number is over 8, we use a sub_common for merging
> several larbs into one larb. At this case, we will extend larb_id:
> bit[11:9] means common-id;
>
On 17/06/2020 05:00, Chao Hao wrote:
> For mt6779, MMU_INV_SEL register's offset is changed from
> 0x38 to 0x2c, so we can put inv_sel_reg in the plat_data to
> use it.
> In addition, we renamed it to REG_MMU_INV_SEL_GEN1 and use it
> before mt6779.
>
> Change since v3:
> 1. Fix coding style
>
n. So rename REG_MMU_MISC_CTRL may be more proper.
>
> This patch only rename the register name, no functional change.
>
> Signed-off-by: Chao Hao
> Reviewed-by: Yong Wu
Reviewed-by: Matthias Brugger
> ---
> drivers/iommu/mtk_iommu.c | 14 +++---
> drivers/iommu/mtk_i
On 08/06/2020 02:50, Song Bao Hua (Barry Song) wrote:
>
>
>> -Original Message-----
>> From: Matthias Brugger [mailto:matthias@gmail.com]
>> Sent: Monday, June 8, 2020 8:15 AM
>> To: Roman Gushchin ; Song Bao Hua (Barry Song)
>>
>> Cc: cata
On 03/06/2020 05:22, Roman Gushchin wrote:
> On Wed, Jun 03, 2020 at 02:42:30PM +1200, Barry Song wrote:
>> hugetlb_cma_reserve() is called at the wrong place. numa_init has not been
>> done yet. so all reserved memory will be located at node0.
>>
>> Cc: Roman Gushchin
>> Signed-off-by: Barry
On 21/08/2019 15:53, Yong Wu wrote:
> Remove the "struct mtk_smi_iommu" to simplify the code since it has only
> one item in it right now.
>
> Signed-off-by: Yong Wu
Reviewed-by: Matthias Brugger
> ---
> drivers/iommu/mtk_iommu.c| 4 ++--
> d
On 20/06/2019 15:59, Yong Wu wrote:
> On Tue, 2019-06-18 at 18:06 +0200, Matthias Brugger wrote:
>>
>> On 10/06/2019 14:17, Yong Wu wrote:
>>> This patch only rename the variable name from enable_4GB to
>>> dram_is_4gb for readable.
>>
>> From my
On 10/06/2019 14:55, Yong Wu wrote:
> MediaTek IOMMU has already added device_link between the consumer
> and smi-larb device. If the jpg device call the pm_runtime_get_sync,
> the smi-larb's pm_runtime_get_sync also be called automatically.
Please help me out find this relation. I seem to
CCing Sascha
On 20/06/2019 11:35, Matthias Brugger wrote:
>
>
> On 13/06/2019 10:14, Pi-Hsun Shih wrote:
>> Hi,
>> When I tested this patch series (Based on linux 5.2.0-rc2, and with
>> various other patch series about MT8183) with lockdep enabled, and I'm
>
9ec/0xcb8
> [5.465503] kthread+0x2b8/0x2d0
> [5.468727] ret_from_fork+0x10/0x18
>
> On Mon, Jun 10, 2019 at 8:21 PM Yong Wu wrote:
>> ...
>
>
> On Mon, Jun 10, 2019 at 8:21 PM Yong Wu wrote:
>
>> There are 2 mmu cells in a M4U HW. we could adju
On 10/06/2019 14:55, Yong Wu wrote:
> The iommu consumer should use device_link to connect with the
> smi-larb(supplier). then the smi-larb should run before the iommu
> consumer. Here we delay the iommu driver until the smi driver is
> ready, then all the iommu consumer always is after the smi
On 18/06/2019 14:10, Yong Wu wrote:
> On Mon, 2019-06-17 at 18:23 +0200, Matthias Brugger wrote:
>>
>> On 10/06/2019 14:17, Yong Wu wrote:
>>> There are 2 mmu cells in a M4U HW. we could adjust some larbs entering
>>> mmu0 or mmu1 to balance the band
On 10/06/2019 14:17, Yong Wu wrote:
> In the 4GB mode, the physical address is remapped,
>
> Here is the detailed remap relationship.
> CPU PA ->HW PA
> 0x4000_ 0x1_4000_ (Add bit32)
> 0x8000_ 0x1_8000_ ...
> 0xc000_ 0x1_c000_ ...
On 10/06/2019 14:17, Yong Wu wrote:
> This patch only rename the variable name from enable_4GB to
> dram_is_4gb for readable.
>From my understanding this is true when available RAM > 4GB so I think the name
should be something like dram_bigger_4gb otherwise it may create confusion
again.
tk_smi_iommu" could also
> be deleted.
>
I think we can get rid of struct mtk_smi_iommu and just add the
struct mtk_smi_larb_iommu larb_imu[MTK_LARB_NR_MAX] directly to mtk_iommu_data,
passing just that array to the components bind function.
Never the less this patch looks fine:
Revi
On 10/06/2019 14:18, Yong Wu wrote:
> Switch to SPDX license identifier for MediaTek iommu/smi and their
> header files.
>
> Signed-off-by: Yong Wu
> Reviewed-by: Rob Herring
> Reviewed-by: Evan Green
Reviewed-by: Matthias Brugger
> ---
> d
u
> Reviewed-by: Evan Green
Reviewed-by: Matthias Brugger
> ---
> drivers/iommu/mtk_iommu.c | 2 ++
> drivers/iommu/mtk_iommu.h | 1 +
> 2 files changed, 3 insertions(+)
>
> diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
> index 6053b8b..86158d8 1006
On 13/06/2019 10:20, Pi-Hsun Shih wrote:
> (Sorry for the possibly double-posting, my last mail got rejected by
> some mailing lists.)
>
> Hi,
> When I tested this patch series (Based on linux 5.2.0-rc2, and with
> various other patch series about MT8183) with lockdep enabled, and I'm
> seeing
e of smi-common is completely different with smi_ao_base
> of gen1, thus I add new variable for that.
>
> CC: Matthias Brugger
> Signed-off-by: Yong Wu
> Reviewed-by: Evan Green
> ---
> drivers/memory/mtk-smi.c | 22 --
> 1 file changed, 20 insertions(
(SMI_BUS_SEL need to be restored after smi-common resume every time.)
> Also it gives a chance to get rid of mtk_smi_larb_get/put which could
> be a next topic.
>
> CC: Matthias Brugger
> Signed-off-by: Yong Wu
> Reviewed-by: Evan Green
Reviewed-by: Matthias Brugger
>
atch for adjusting SMI_BUS_SEL for mt8183.
>
> Signed-off-by: Yong Wu
> Reviewed-by: Evan Green
Reviewed-by: Matthias Brugger
> ---
> drivers/iommu/mtk_iommu.c | 46 +-
> 1 file changed, 29 insertions(+), 17 deletions(-)
> 7) the larb-id in smi-common is remapped. M4U should add its larbid_remap.
>
> Signed-off-by: Yong Wu
> Reviewed-by: Evan Green
Reviewed-by: Matthias Brugger
> ---
> drivers/iommu/mtk_iommu.c | 15 ---
> drivers/iommu/mtk_iommu.h | 1 +
> drivers/memory/
i-larb.
>
> This patch adds gals clock supporting in the SMI. Note that some larbs
> may still don't have the "gals" clock like larb1 and larb4 above.
>
> This is also a preparing patch for mt8183 which has GALS.
>
> CC: Matthias Brugger
> Signed-off-by: Yong Wu
>
On 10/06/2019 14:17, Yong Wu wrote:
> Both mt8173 and mt8183 don't have this vld_pa_rng(valid physical address
> range) register while mt2712 have. Move it into the plat_data.
>
> Signed-off-by: Yong Wu
> Reviewed-by: Evan Green
Reviewed-by: Matthias Brugger
> --
lso a preparing
> patch for mt8183.
>
> Signed-off-by: Yong Wu
> Reviewed-by: Nicolas Boichat
> Reviewed-by: Evan Green
Reviewed-by: Matthias Brugger
> ---
> drivers/iommu/mtk_iommu.c | 4 ++--
> drivers/iommu/mtk_iommu.h | 2 +-
> 2 files changed, 3 insertions(+)
the complex MACRO and use a common if-else
> instead.
>
> Signed-off-by: Yong Wu
> Reviewed-by: Evan Green
Reviewed-by: Matthias Brugger
> ---
> drivers/iommu/mtk_iommu.c | 13 ++---
> 1 file changed, 6 insertions(+), 7 deletions(-)
>
> diff --git a/dr
ationship in this patch.
>
> If there is no this larb-id remapping in some SoCs, use the linear
> mapping array instead.
>
> This also is a preparing patch for mt8183.
>
> Signed-off-by: Yong Wu
> Reviewed-by: Nicolas Boichat
> Reviewed-by: Evan Green
Reviewed
a preparing patch for mt8183.
>
> Signed-off-by: Yong Wu
> Reviewed-by: Evan Green
Reviewed-by: Matthias Brugger
> ---
> drivers/iommu/mtk_iommu.c | 10 +++---
> drivers/iommu/mtk_iommu.h | 3 +++
> 2 files changed, 10 insertions(+), 3 deletions(-)
>
> diff --git
! Resetting...\n");
> + WARN_ON(is_kdump_kernel() && !disable_bypass);
> + arm_smmu_update_gbpa(smmu, GBPA_ABORT, 0);
> }
>
> ret = arm_smmu_device_disable(smmu);
> @@ -2553,6 +2549,8 @@ static int arm_smmu_device_reset(struct arm_smmu_device
> *smmu,
rivers/iommu/mtk_iommu.c:644:3-9: ERROR: missing of_node_put; acquired a
> node pointer with refcount incremented on line 631, but without a
> corresponding object release within this function.
>
> Signed-off-by: Wen Yang
> Cc: Joerg Roedel
> Cc: Matthias Brugger
> Cc
On 05/03/2019 20:03, Evan Green wrote:
> On Wed, Feb 27, 2019 at 6:33 AM Yong Wu wrote:
>>
>> On Mon, 2019-02-25 at 15:53 -0800, Evan Green wrote:
>>> On Mon, Dec 31, 2018 at 8:52 PM Yong Wu wrote:
DL_FLAG_AUTOREMOVE_CONSUMER/SUPPLIER means "Remove the link
automatically on
On 08/12/2018 09:39, Yong Wu wrote:
> The M4U IP blocks in mt8183 is MediaTek's generation2 M4U which use
> the ARM Short-descriptor like mt8173, and most of the HW registers
> are the same.
>
> Here list main differences between mt8183 and mt8173/mt2712:
> 1) mt8183 has only one M4U HW like
on_plat" before it is referred.
>
> This is a preparing patch for mt8183.
>
> Signed-off-by: Yong Wu
Reviewed-by: Matthias Brugger
> ---
> drivers/memory/mtk-smi.c | 35 ---
> 1 file changed, 24 insertions(+), 11 deletions(-)
>
> di
I'm not really happy with the name larb_special_mask but I can't think of
anything else. The comment is not needed as it just rewords the name of the
variable.
Other then that (or even without changing anything):
Reviewed-by: Matthias Brugger
> };
>
> struct mtk_smi {
> @@ -176,17
On 08/12/2018 09:39, Yong Wu wrote:
> Use a struct as the platform special data instead of the enumeration.
> This is a prepare patch for adding mt8183 iommu support.
>
> Signed-off-by: Yong Wu
> ---
Reviewed-by: Matthias Brugger
> drivers/iomm
On 17/11/2018 03:35, Yong Wu wrote:
> The M4U IP blocks in mt8183 is MediaTek's generation2 M4U which use
> the ARM Short-descriptor like mt8173, and most of the HW registers
> are the same.
>
> Here list main changes in mt8183:
> 1) mt8183 has only one M4U HW like mt8173.
That's a change?
>
On 17/11/2018 03:35, Yong Wu wrote:
> The "mediatek,larb-id" has already been parsed in MTK IOMMU driver.
> It's no need to parse it again in SMI driver. Only clean some codes.
> This patch is fit for all the current mt2701, mt2712, mt7623, mt8173
> and mt8183.
I'm trying to understand why we
On 03/10/2018 11:09, Matthias Brugger wrote:
> Mediateks MT7623 SoC shares most of its component with MT2701.
> This series adds devicetree documentation for all the devices.
>
> It applies cleanly against linux next, so I don't expect any merge
> conflicts if this is taken
This patch add the binding documentation for the iommu and smi
devices on the MT7623 SoC.
Signed-off-by: Matthias Brugger
---
.../bindings/memory-controllers/mediatek,smi-common.txt| 1 +
.../bindings/memory-controllers/mediatek,smi-larb.txt | 3 ++-
2 files changed, 3
This patch adds binding documentation for MT7623 SoC.
Signed-off-by: Matthias Brugger
---
Documentation/devicetree/bindings/iommu/mediatek,iommu.txt | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
b/Documentation
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