On Fri, 23 Jul 2021 14:40:26 PDT (-0700), Atish Patra wrote:
RISC-V privilege specification doesn't define an IOMMU or any method modify
PMA attributes or PTE entries to allow non-coherent mappings yet. In
the beginning, this approach was adopted assuming that most of the RISC-V
platforms would
On Mon, 16 Sep 2019 11:18:00 PDT (-0700), w...@kernel.org wrote:
On Sun, Sep 15, 2019 at 05:03:38AM +, Anup Patel wrote:
> -Original Message-
> From: linux-kernel-ow...@vger.kernel.org ow...@vger.kernel.org> On Behalf Of Palmer Dabbelt
> Sent: Saturday, September 14,
On Thu, 12 Sep 2019 07:02:56 PDT (-0700), w...@kernel.org wrote:
On Sun, Sep 08, 2019 at 07:52:55AM +0800, Guo Ren wrote:
On Mon, Jun 24, 2019 at 6:40 PM Will Deacon wrote:
> > I'll keep my system use the same ASID for SMP + IOMMU :P
>
> You will want a separate allocator for that:
>
>
On Mon, 19 Nov 2018 05:58:52 PST (-0800), Christoph Hellwig wrote:
On Fri, Nov 16, 2018 at 08:52:14AM -0800, Palmer Dabbelt wrote:
As far as I can tell, it looks like m68k, mips, and powerpc mention an
IOMMU in their ports, don't set ARCH_HAS_SG_CHAIN, and with this patch set
won't set
On Fri, 09 Nov 2018 01:00:08 PST (-0800), Christoph Hellwig wrote:
These days architectures are mostly out of the business of dealing with
struct scatterlist at all, unless they have architecture specific iommu
drivers. Replace the ARCH_HAS_SG_CHAIN symbol with a ARCH_NO_SG_CHAIN
one only
generic-y += sembuf.h
generic-y += serial.h
Reviewed-by: Palmer Dabbelt
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than our current implementation, which isn't
based on the generic stuff :). I'm happy to have these through that tree if it
makes the merging easier, feel free to add an
Acked-by: Palmer Dabbelt <pal...@sifive.com>
and/or a
Reviewed-by: Palmer Dabbelt <pal...@sifive.com&g
+26,6 @@
/* RISC-V shim does not initialize PCI bus */
#define pcibios_assign_all_busses() 1
-/* We do not have an IOMMU */
-#define PCI_DMA_BUS_IS_PHYS 1
-
extern int isa_dma_bridge_buggy;
#ifdef CONFIG_PCI
Thanks!
Acked-by: Palmer Dabbelt <pal...@sifive.com> (For the R
