[PATCH v2 02/13] iommu/amd: Prepare for generic IO page table framework

2020-10-02 Thread Suravee Suthikulpanit
Add initial hook up code to implement generic IO page table framework. Signed-off-by: Suravee Suthikulpanit --- drivers/iommu/amd/Kconfig | 1 + drivers/iommu/amd/Makefile | 2 +- drivers/iommu/amd/amd_iommu_types.h | 32 + drivers/iommu/amd/io_pgtable.c

[PATCH v2 05/13] iommu/amd: Declare functions as extern

2020-10-02 Thread Suravee Suthikulpanit
And move declaration to header file so that they can be included across multiple files. There is no functional change. Signed-off-by: Suravee Suthikulpanit --- drivers/iommu/amd/amd_iommu.h | 3 +++ drivers/iommu/amd/iommu.c | 39 +-- 2 files changed, 22

[PATCH v2 03/13] iommu/amd: Move pt_root to to struct amd_io_pgtable

2020-10-02 Thread Suravee Suthikulpanit
To better organize the data structure since it contains IO page table related information. Signed-off-by: Suravee Suthikulpanit --- drivers/iommu/amd/amd_iommu.h | 2 +- drivers/iommu/amd/amd_iommu_types.h | 2 +- drivers/iommu/amd/iommu.c | 2 +- 3 files changed, 3 insertions

[PATCH v2 00/13] iommu/amd: Add Generic IO Page Table Framework Support

2020-10-02 Thread Suravee Suthikulpanit
. (patch 2/13) - Move amd_iommu_setup_io_pgtable_ops to iommu.c instead of io_pgtable.c patch 13/13) Suravee Suthikulpanit (13): iommu/amd: Re-define amd_iommu_domain_encode_pgtable as inline iommu/amd: Prepare for generic IO page table framework iommu/amd: Move pt_root to to struct

[PATCH v2 04/13] iommu/amd: Convert to using amd_io_pgtable

2020-10-02 Thread Suravee Suthikulpanit
Make use of the new struct amd_io_pgtable in preparation to remove the struct domain_pgtable. Signed-off-by: Suravee Suthikulpanit --- drivers/iommu/amd/amd_iommu.h | 1 + drivers/iommu/amd/iommu.c | 25 ++--- 2 files changed, 11 insertions(+), 15 deletions(-) diff

Re: [PATCH v2 00/13] iommu/amd: Add Generic IO Page Table Framework Support

2020-10-03 Thread Suravee Suthikulpanit
I found an issue w/ this series. Please ignore. I'll send out V3. Regards, Suravee On 10/2/20 7:28 PM, Suravee Suthikulpanit wrote: The framework allows callable implementation of IO page table. This allows AMD IOMMU driver to switch between different types of AMD IOMMU page tables (e.g.

[PATCH v3 05/14] iommu/amd: Declare functions as extern

2020-10-03 Thread Suravee Suthikulpanit
And move declaration to header file so that they can be included across multiple files. There is no functional change. Signed-off-by: Suravee Suthikulpanit --- drivers/iommu/amd/amd_iommu.h | 3 +++ drivers/iommu/amd/iommu.c | 39 +-- 2 files changed, 22

[PATCH v3 00/14] iommu/amd: Add Generic IO Page Table Framework Support

2020-10-03 Thread Suravee Suthikulpanit
struct iommu_flush_ops. (patch 2/13) - Move amd_iommu_setup_io_pgtable_ops to iommu.c instead of io_pgtable.c patch 13/13) Suravee Suthikulpanit (14): iommu/amd: Re-define amd_iommu_domain_encode_pgtable as inline iommu/amd: Prepare for generic IO page table framework iommu/amd: Move

[PATCH v3 09/14] iommu/amd: Rename variables to be consistent with struct io_pgtable_ops

2020-10-03 Thread Suravee Suthikulpanit
There is no functional change. Signed-off-by: Suravee Suthikulpanit --- drivers/iommu/amd/io_pgtable.c | 31 +++ 1 file changed, 15 insertions(+), 16 deletions(-) diff --git a/drivers/iommu/amd/io_pgtable.c b/drivers/iommu/amd/io_pgtable.c index 6c063d2c8bf0

[PATCH v3 08/14] iommu/amd: Remove amd_iommu_domain_get_pgtable

2020-10-03 Thread Suravee Suthikulpanit
Since the IO page table root and mode parameters have been moved into the struct amd_io_pg, the function is no longer needed. Therefore, remove it along with the struct domain_pgtable. Signed-off-by: Suravee Suthikulpanit --- drivers/iommu/amd/amd_iommu.h | 4 ++-- drivers/iommu/amd

[PATCH v3 02/14] iommu/amd: Prepare for generic IO page table framework

2020-10-03 Thread Suravee Suthikulpanit
Add initial hook up code to implement generic IO page table framework. Signed-off-by: Suravee Suthikulpanit --- drivers/iommu/amd/Kconfig | 1 + drivers/iommu/amd/Makefile | 2 +- drivers/iommu/amd/amd_iommu_types.h | 35 +++ drivers/iommu/amd

[PATCH v3 04/14] iommu/amd: Convert to using amd_io_pgtable

2020-10-03 Thread Suravee Suthikulpanit
Make use of the new struct amd_io_pgtable in preparation to remove the struct domain_pgtable. Signed-off-by: Suravee Suthikulpanit --- drivers/iommu/amd/amd_iommu.h | 1 + drivers/iommu/amd/iommu.c | 25 ++--- 2 files changed, 11 insertions(+), 15 deletions(-) diff

[PATCH v3 01/14] iommu/amd: Re-define amd_iommu_domain_encode_pgtable as inline

2020-10-03 Thread Suravee Suthikulpanit
Move the function to header file to allow inclusion in other files. Signed-off-by: Suravee Suthikulpanit --- drivers/iommu/amd/amd_iommu.h | 13 + drivers/iommu/amd/iommu.c | 10 -- 2 files changed, 13 insertions(+), 10 deletions(-) diff --git a/drivers/iommu/amd

[PATCH v3 03/14] iommu/amd: Move pt_root to to struct amd_io_pgtable

2020-10-03 Thread Suravee Suthikulpanit
To better organize the data structure since it contains IO page table related information. Signed-off-by: Suravee Suthikulpanit --- drivers/iommu/amd/amd_iommu.h | 2 +- drivers/iommu/amd/amd_iommu_types.h | 2 +- drivers/iommu/amd/iommu.c | 2 +- 3 files changed, 3 insertions

[PATCH v3 10/14] iommu/amd: Refactor fetch_pte to use struct amd_io_pgtable

2020-10-03 Thread Suravee Suthikulpanit
To simplify the fetch_pte function. There is no functional change. Signed-off-by: Suravee Suthikulpanit --- drivers/iommu/amd/amd_iommu.h | 2 +- drivers/iommu/amd/io_pgtable.c | 13 +++-- drivers/iommu/amd/iommu.c | 4 +++- 3 files changed, 11 insertions(+), 8 deletions

[PATCH v3 06/14] iommu/amd: Move IO page table related functions

2020-10-03 Thread Suravee Suthikulpanit
Preparing to migrate to use IO page table framework. There is no functional change. Signed-off-by: Suravee Suthikulpanit --- drivers/iommu/amd/amd_iommu.h | 18 ++ drivers/iommu/amd/io_pgtable.c | 473 drivers/iommu/amd/iommu.c | 476

[PATCH v3 07/14] iommu/amd: Restructure code for freeing page table

2020-10-03 Thread Suravee Suthikulpanit
Introduce amd_iommu_free_pgtable helper function, which consolidates logic for freeing page table. Signed-off-by: Suravee Suthikulpanit --- drivers/iommu/amd/amd_iommu.h | 2 +- drivers/iommu/amd/io_pgtable.c | 12 +++- drivers/iommu/amd/iommu.c | 19 ++- 3 files

[PATCH v3 11/14] iommu/amd: Introduce iommu_v1_iova_to_phys

2020-10-03 Thread Suravee Suthikulpanit
This implements iova_to_phys for AMD IOMMU v1 pagetable, which will be used by the IO page table framework. Signed-off-by: Suravee Suthikulpanit --- drivers/iommu/amd/io_pgtable.c | 22 ++ drivers/iommu/amd/iommu.c | 16 +--- 2 files changed, 23 insertions

[PATCH v3 12/14] iommu/amd: Introduce iommu_v1_map_page and iommu_v1_unmap_page

2020-10-03 Thread Suravee Suthikulpanit
These implement map and unmap for AMD IOMMU v1 pagetable, which will be used by the IO pagetable framework. Also clean up unused extern function declarations. Signed-off-by: Suravee Suthikulpanit --- drivers/iommu/amd/amd_iommu.h | 13 - drivers/iommu/amd/io_pgtable.c | 25

[PATCH v3 14/14] iommu/amd: Adopt IO page table framework

2020-10-03 Thread Suravee Suthikulpanit
Switch to using IO page table framework for AMD IOMMU v1 page table. Signed-off-by: Suravee Suthikulpanit --- drivers/iommu/amd/iommu.c | 26 ++ 1 file changed, 26 insertions(+) diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c index 77f44b927ae7

[PATCH v3 13/14] iommu/amd: Introduce IOMMU flush callbacks

2020-10-03 Thread Suravee Suthikulpanit
Add TLB flush callback functions, which are used by the IO page table framework. Signed-off-by: Suravee Suthikulpanit --- drivers/iommu/amd/io_pgtable.c | 29 + 1 file changed, 29 insertions(+) diff --git a/drivers/iommu/amd/io_pgtable.c b/drivers/iommu/amd

[PATCH] iommu/amd: Increase interrupt remapping table limit to 512 entries

2020-10-14 Thread Suravee Suthikulpanit
: Suravee Suthikulpanit --- drivers/iommu/amd/amd_iommu_types.h | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/iommu/amd/amd_iommu_types.h b/drivers/iommu/amd/amd_iommu_types.h index 30a5d412255a..427484c45589 100644 --- a/drivers/iommu/amd/amd_iommu_types.h +++ b

Re: [PATCH] iommu/amd: Increase interrupt remapping table limit to 512 entries

2020-10-25 Thread Suravee Suthikulpanit
Hi Joerg, Do you have any concerns regarding this patch? Thanks, Suravee On 10/15/20 9:50 AM, Suravee Suthikulpanit wrote: Certain device drivers allocate IO queues on a per-cpu basis. On AMD EPYC platform, which can support up-to 256 cpu threads, this can exceed the current MAX_IRQ_PER_TABLE

[PATCH] iommu/amd: Enforce 4k mapping for certain IOMMU data structures

2020-10-28 Thread Suravee Suthikulpanit
data structures. So, fix by calling set_memory_4k() on the allocated pages. Fixes: commit c69d89aff393 ("iommu/amd: Use 4K page for completion wait write-back semaphore") Cc: Brijesh Singh Signed-off-by: Suravee Suthikulpanit --- drivers/iommu/amd/init.c | 22 +---

Re: [PATCH v3 00/14] iommu/amd: Add Generic IO Page Table Framework Support

2020-11-01 Thread Suravee Suthikulpanit
Joerg, You mentioned to remind you to pull this in to linux-next. Thanks, Suravee On 10/4/20 8:45 AM, Suravee Suthikulpanit wrote: The framework allows callable implementation of IO page table. This allows AMD IOMMU driver to switch between different types of AMD IOMMU page tables (e.g. v1 vs

[PATCH v2] iommu/amd: Enforce 4k mapping for certain IOMMU data structures

2020-11-05 Thread Suravee Suthikulpanit
data structures. So, fix by calling set_memory_4k() on the allocated pages. Fixes: commit c69d89aff393 ("iommu/amd: Use 4K page for completion wait write-back semaphore") Cc: Brijesh Singh Signed-off-by: Suravee Suthikulpanit --- drivers/iommu/amd/init.c | 27 ++---

Re: [PATCH v3 00/14] iommu/amd: Add Generic IO Page Table Framework Support

2020-11-10 Thread Suravee Suthikulpanit
Hi Joerg, Do you have any update on this series? Thanks, Suravee On 11/2/20 10:16 AM, Suravee Suthikulpanit wrote: Joerg, You mentioned to remind you to pull this in to linux-next. Thanks, Suravee On 10/4/20 8:45 AM, Suravee Suthikulpanit wrote: The framework allows callable

Re: [PATCH v3 00/14] iommu/amd: Add Generic IO Page Table Framework Support

2020-11-12 Thread Suravee Suthikulpanit
Joerg, Please ignore to include the V3. I am working on V4 to resubmit. Thank you, Suravee On 11/11/20 10:10 AM, Suravee Suthikulpanit wrote: Hi Joerg, Do you have any update on this series? Thanks, Suravee On 11/2/20 10:16 AM, Suravee Suthikulpanit wrote: Joerg, You mentioned to remind

Re: [PATCH] iommu/amd: Enforce 4k mapping for certain IOMMU data structures

2020-11-19 Thread Suravee Suthikulpanit
Will, I have already submitted v2 of this patch. Let me move the discussion there instead ... (https://lore.kernel.org/linux-iommu/20201105145832.3065-1-suravee.suthikulpa...@amd.com/) Suravee On 11/18/20 5:57 AM, Will Deacon wrote: On Wed, Oct 28, 2020 at 11:18:24PM +, Suravee

Re: [PATCH v2] iommu/amd: Enforce 4k mapping for certain IOMMU data structures

2020-11-19 Thread Suravee Suthikulpanit
Will, To answer your questions from v1 thread. On 11/18/20 5:57 AM, Will Deacon wrote: > On 11/5/20 9:58 PM, Suravee Suthikulpanit wrote: >> AMD IOMMU requires 4k-aligned pages for the event log, the PPR log, >> and the completion wait write-back regions. However, when allocati

[PATCH] MAINTAINERS: Add Suravee Suthikulpanit as Reviewer for AMD IOMMU (AMD-Vi)

2021-07-14 Thread Suravee Suthikulpanit via iommu
To help review changes related to AMD IOMMU. Signed-off-by: Suravee Suthikulpanit --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index b80e6f7..8022dbd 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -933,6 +933,7 @@ F: drivers/video/fbdev/geode

[PATCH 0/3] iommu/amd: Fix unable to handle page fault due to AVIC

2021-08-20 Thread Suravee Suthikulpanit via iommu
, which is available after PCI support for IOMMU is initialized. This helps avoid having to disable and clean up the already initialized interrupt-remapping-related parameter. Thanks, Suravee Suravee Suthikulpanit (2): iommu/amd: Introduce helper function to check feature bit on all IOMMUs

[PATCH 2/3] iommu/amd: Relocate GAMSup check to early_enable_iommus

2021-08-20 Thread Suravee Suthikulpanit via iommu
entry_SYSCALL_64_after_hwframe+0x44/0xae Fixes by moving the initializing of AMD IOMMU interrupt remapping mode (amd_iommu_guest_ir) earlier before setting up the amd_iommu_irq_ops.capability with appropriate IRQ_POSTING_CAP flag. Signed-off-by: Wei Huang Signed-off-by: Suravee Suthikulpanit --- drivers/iommu/amd

[PATCH 1/3] iommu/amd: Introduce helper function to check feature bit on all IOMMUs

2021-08-20 Thread Suravee Suthikulpanit via iommu
IOMMU advertises feature via Extended Features Register (EFR). The helper function checks if the specified feature bit is set across all IOMMUs. Signed-off-by: Suravee Suthikulpanit --- drivers/iommu/amd/init.c | 13 + 1 file changed, 13 insertions(+) diff --git a/drivers/iommu/amd

[PATCH 3/3] iommu/amd: Remove iommu_init_ga()

2021-08-20 Thread Suravee Suthikulpanit via iommu
Since the function has been simplified and only call iommu_init_ga_log(), remove the function and replace with iommu_init_ga_log() instead. Signed-off-by: Suravee Suthikulpanit --- drivers/iommu/amd/init.c | 17 - 1 file changed, 4 insertions(+), 13 deletions(-) diff --git a

[PATCH] iommu/amd: Set translation valid bit only when IO page tables are in used

2022-04-20 Thread Suravee Suthikulpanit via iommu
page table is in used. This results in ILLEGAL_DEV_TABLE_ENTRY event for devices, which do not the host page table root pointer set up. Thefore, only set TV bit when host or guest page tables are in used. Signed-off-by: Suravee Suthikulpanit --- drivers/iommu/amd/init.c | 4 +--- drivers/iommu

Re: [PATCH] iommu/amd: Set translation valid bit only when IO page tables are in used

2022-04-28 Thread Suravee Suthikulpanit via iommu
On 4/20/22 6:29 PM, Suravee Suthikulpanit wrote: On AMD system with SNP enabled, IOMMU hardware checks the host translation valid (TV) and guest translation valid (GV) bits in the device table entry (DTE) before accessing the corresponded page tables. However, current IOMMU driver sets the

[PATCH v2] iommu/amd: Set translation valid bit only when IO page tables are in used

2022-05-09 Thread Suravee Suthikulpanit via iommu
page table is in used. This results in ILLEGAL_DEV_TABLE_ENTRY event for devices, which do not the host page table root pointer set up. Thefore, only set TV bit when DMA remapping is not used, which is when domain ID in the AMD IOMMU device table entry (DTE) is zero. Signed-off-by: Suravee

Re: [PATCH v2] iommu/amd: Set translation valid bit only when IO page tables are in used

2022-05-16 Thread Suravee Suthikulpanit via iommu
Joerg, On 5/13/22 8:07 PM, Joerg Roedel wrote: On Mon, May 09, 2022 at 02:48:15AM -0500, Suravee Suthikulpanit wrote: On AMD system with SNP enabled, IOMMU hardware checks the host translation valid (TV) and guest translation valid (GV) bits in the device table entry (DTE) before accessing the

Re: [PATCH v2] iommu/amd: Set translation valid bit only when IO page tables are in used

2022-05-25 Thread Suravee Suthikulpanit via iommu
Joerg, On 5/20/22 3:09 PM, Joerg Roedel wrote: Hi Suravee, On Mon, May 16, 2022 at 07:27:51PM +0700, Suravee Suthikulpanit wrote: - Also, it seems that the current iommu v2 page table use case, where GVA->GPA=SPA will no longer be supported on system w/ SNPSup=1. Any thoughts? Support

Re: [PATCH RFC 09/19] iommu/amd: Access/Dirty bit support in IOPTEs

2022-05-31 Thread Suravee Suthikulpanit via iommu
Joao, On 4/29/22 4:09 AM, Joao Martins wrote: . +static int amd_iommu_set_dirty_tracking(struct iommu_domain *domain, + bool enable) +{ + struct protection_domain *pdomain = to_pdomain(domain); + struct iommu_dev_data *dev_data; + bool

Re: [PATCH RFC 10/19] iommu/amd: Add unmap_read_dirty() support

2022-05-31 Thread Suravee Suthikulpanit via iommu
On 4/29/22 4:09 AM, Joao Martins wrote: AMD implementation of unmap_read_dirty() is pretty simple as mostly reuses unmap code with the extra addition of marshalling the dirty bit into the bitmap as it walks the to-be-unmapped IOPTE. Extra care is taken though, to switch over to cmpxchg as opp

[PATCH 0/7] iommu/amd: Enforce IOMMU restrictions for SNP-enabled system

2022-06-12 Thread Suravee Suthikulpanit via iommu
/amd: Introduce function to check SEV-SNP support Suravee Suthikulpanit (6): iommu/amd: Process all IVHDs before enabling IOMMU features iommu/amd: Introduce a global variable for tracking SNP enable status iommu/amd: Set translation valid bit only when IO page tables are in use iommu

[PATCH 5/7] iommu: Add domain_type_supported() callback in iommu_ops

2022-06-12 Thread Suravee Suthikulpanit via iommu
match the default type. Introducing check_domain_type_supported() callback in iommu_ops, which allows IOMMU generic layer to check with vendor-specific IOMMU driver whether the requested type is supported. This allows user to request types other than the default type. Signed-off-by: Suravee

[PATCH 1/7] iommu/amd: Process all IVHDs before enabling IOMMU features

2022-06-12 Thread Suravee Suthikulpanit via iommu
the IVRS table for all IOMMU instances. This allow all IVHDs to be processed prior to enabling features. Phase 2 iterates through all IOMMU instances and enabling each features. Signed-off-by: Suravee Suthikulpanit --- drivers/iommu/amd/init.c | 20 ++-- 1 file changed, 14

[PATCH 2/7] iommu/amd: Introduce a global variable for tracking SNP enable status

2022-06-12 Thread Suravee Suthikulpanit via iommu
: Suravee Suthikulpanit --- drivers/iommu/amd/init.c | 42 ++-- 1 file changed, 40 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/amd/init.c b/drivers/iommu/amd/init.c index 6a4a019f1e1d..3965bd3f4f67 100644 --- a/drivers/iommu/amd/init.c +++ b/drivers

[PATCH 7/7] iommu/amd: Do not support IOMMUv2 APIs when SNP is enabled

2022-06-12 Thread Suravee Suthikulpanit via iommu
The IOMMUv2 APIs (for supporting shared virtual memory with PASID) configures the domain with IOMMU v2 page table, and sets DTE[Mode]=0. This configuration cannot be supported on SNP-enabled system. Signed-off-by: Suravee Suthikulpanit --- drivers/iommu/amd/init.c | 7 ++- 1 file changed, 6

[PATCH 4/7] iommu/amd: Set translation valid bit only when IO page tables are in use

2022-06-12 Thread Suravee Suthikulpanit via iommu
-by: Suravee Suthikulpanit --- drivers/iommu/amd/init.c | 3 ++- drivers/iommu/amd/iommu.c | 15 +-- 2 files changed, 15 insertions(+), 3 deletions(-) diff --git a/drivers/iommu/amd/init.c b/drivers/iommu/amd/init.c index da32e7bdd1fa..a9152d3f33bf 100644 --- a/drivers/iommu/amd

[PATCH 6/7] iommu/amd: Do not support IOMMU_DOMAIN_IDENTITY when SNP is enabled

2022-06-12 Thread Suravee Suthikulpanit via iommu
Since DTE[Mode]=0 is prohibited on system, which enables SNP, the passthrough domain (IOMMU_DOMAIN_IDENTITY) is not support. Instead, only support IOMMU_DOMAIN_DMA[_FQ] domains. Signed-off-by: Suravee Suthikulpanit --- drivers/iommu/amd/iommu.c | 12 1 file changed, 12 insertions

[PATCH 3/7] iommu/amd: Introduce function to check SEV-SNP support

2022-06-12 Thread Suravee Suthikulpanit via iommu
Suthikulpanit Signed-off-by: Suravee Suthikulpanit Signed-off-by: Brijesh Singh --- drivers/iommu/amd/amd_iommu_types.h | 11 drivers/iommu/amd/init.c| 39 ++--- drivers/iommu/amd/iommu.c | 4 +-- include/linux/iommu.h | 9

[PATCH v2 0/7] iommu/amd: Enforce IOMMU restrictions for SNP-enabled system

2022-06-15 Thread Suravee Suthikulpanit via iommu
declaration to include/linux/amd-iommu.h - Patch 6: Modify amd_iommu_domain_alloc() to fail when allocating identity domain and SNP is enabled. Best Regards, Suravee Brijesh Singh (1): iommu/amd: Introduce function to check and enable SNP Suravee Suthikulpanit (6): iommu/amd: Warn when

[PATCH v2 1/7] iommu/amd: Warn when found inconsistency EFR mask

2022-06-15 Thread Suravee Suthikulpanit via iommu
through all IOMMUs even when found that the bit is not set, and also throws a FW_BUG warning if inconsistency is found. Signed-off-by: Suravee Suthikulpanit --- drivers/iommu/amd/init.c | 19 +++ 1 file changed, 15 insertions(+), 4 deletions(-) diff --git a/drivers/iommu/amd

[PATCH v2 3/7] iommu/amd: Introduce an iommu variable for tracking SNP support status

2022-06-15 Thread Suravee Suthikulpanit via iommu
is initialized before enabling the rest of IOMMU features. Also report IOMMU SNP support information for each IOMMU. Signed-off-by: Suravee Suthikulpanit --- drivers/iommu/amd/init.c | 12 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/iommu/amd/init.c b

[PATCH v2 5/7] iommu/amd: Set translation valid bit only when IO page tables are in use

2022-06-15 Thread Suravee Suthikulpanit via iommu
-by: Suravee Suthikulpanit --- drivers/iommu/amd/init.c | 3 ++- drivers/iommu/amd/iommu.c | 15 +-- 2 files changed, 15 insertions(+), 3 deletions(-) diff --git a/drivers/iommu/amd/init.c b/drivers/iommu/amd/init.c index b5d3de327a5f..bc008a82c12c 100644 --- a/drivers/iommu/amd

[PATCH v2 2/7] iommu/amd: Process all IVHDs before enabling IOMMU features

2022-06-15 Thread Suravee Suthikulpanit via iommu
of the IVRS table for all IOMMU instances. This allow all IVHDs to be processed prior to enabling features. Phase2 : Early feature support check on all IOMMUs (using information in IVHD blocks. Phase3 : Iterates through all IOMMU instances and enabling features. Signed-off-by: Suravee

[PATCH v2 7/7] iommu/amd: Do not support IOMMUv2 APIs when SNP is enabled

2022-06-15 Thread Suravee Suthikulpanit via iommu
The IOMMUv2 APIs (for supporting shared virtual memory with PASID) configures the domain with IOMMU v2 page table, and sets DTE[Mode]=0. This configuration cannot be supported on SNP-enabled system. Signed-off-by: Suravee Suthikulpanit --- drivers/iommu/amd/init.c | 7 ++- 1 file changed, 6

[PATCH v2 6/7] iommu/amd: Do not support IOMMU_DOMAIN_IDENTITY after SNP is enabled

2022-06-15 Thread Suravee Suthikulpanit via iommu
: Suravee Suthikulpanit --- drivers/iommu/amd/iommu.c | 9 + 1 file changed, 9 insertions(+) diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c index 4f4571d3ff61..d8a6df423b90 100644 --- a/drivers/iommu/amd/iommu.c +++ b/drivers/iommu/amd/iommu.c @@ -2119,6 +2119,15

[PATCH v2 4/7] iommu/amd: Introduce function to check and enable SNP

2022-06-15 Thread Suravee Suthikulpanit via iommu
determines if the feature can be safely enabled. Please see the IOMMU spec section 2.12 for further details. Co-developed-by: Suravee Suthikulpanit Signed-off-by: Suravee Suthikulpanit Signed-off-by: Brijesh Singh --- drivers/iommu/amd/amd_iommu_types.h | 5 drivers/iommu/amd/init.c

[PATCH v3 1/7] iommu/amd: Warn when found inconsistency EFR mask

2022-06-22 Thread Suravee Suthikulpanit via iommu
through all IOMMUs even when found that the bit is not set, and also throws a FW_BUG warning if inconsistency is found. Signed-off-by: Suravee Suthikulpanit --- drivers/iommu/amd/init.c | 19 +++ 1 file changed, 15 insertions(+), 4 deletions(-) diff --git a/drivers/iommu/amd

[PATCH v3 2/7] iommu/amd: Process all IVHDs before enabling IOMMU features

2022-06-22 Thread Suravee Suthikulpanit via iommu
of the IVRS table for all IOMMU instances. This allow all IVHDs to be processed prior to enabling features. Phase2 : Early feature support check on all IOMMUs (using information in IVHD blocks. Phase3 : Iterates through all IOMMU instances and enabling features. Signed-off-by: Suravee

[PATCH v3 4/7] iommu/amd: Introduce function to check and enable SNP

2022-06-22 Thread Suravee Suthikulpanit via iommu
determines if the feature can be safely enabled. Please see the IOMMU spec section 2.12 for further details. Reviewed-by: Robin Murphy Co-developed-by: Suravee Suthikulpanit Signed-off-by: Suravee Suthikulpanit Signed-off-by: Brijesh Singh --- drivers/iommu/amd/amd_iommu_types.h | 5

[PATCH v3 5/7] iommu/amd: Set translation valid bit only when IO page tables are in use

2022-06-22 Thread Suravee Suthikulpanit via iommu
-by: Suravee Suthikulpanit --- drivers/iommu/amd/init.c | 3 ++- drivers/iommu/amd/iommu.c | 15 +-- 2 files changed, 15 insertions(+), 3 deletions(-) diff --git a/drivers/iommu/amd/init.c b/drivers/iommu/amd/init.c index c62fb4470519..f5695ccb7c81 100644 --- a/drivers/iommu/amd

[PATCH v3 0/7] iommu/amd: Enforce IOMMU restrictions for SNP-enabled system

2022-06-22 Thread Suravee Suthikulpanit via iommu
. * Remove function stub when CONFIG_AMD_MEM_ENCRYPT is not set. - Patch 6: Change to WARN_ONCE. Best Regards, Suravee Brijesh Singh (1): iommu/amd: Introduce function to check and enable SNP Suravee Suthikulpanit (6): iommu/amd: Warn when found inconsistency EFR mask iommu/amd

[PATCH v3 6/7] iommu/amd: Do not support IOMMU_DOMAIN_IDENTITY after SNP is enabled

2022-06-22 Thread Suravee Suthikulpanit via iommu
: Robin Murphy Signed-off-by: Suravee Suthikulpanit --- drivers/iommu/amd/iommu.c | 8 1 file changed, 8 insertions(+) diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c index 4f4571d3ff61..7093e26fec59 100644 --- a/drivers/iommu/amd/iommu.c +++ b/drivers/iommu/amd/iommu.c

[PATCH v3 3/7] iommu/amd: Introduce an iommu variable for tracking SNP support status

2022-06-22 Thread Suravee Suthikulpanit via iommu
is initialized before enabling the rest of IOMMU features. Also report IOMMU SNP support information for each IOMMU. Signed-off-by: Suravee Suthikulpanit --- drivers/iommu/amd/init.c | 12 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/iommu/amd/init.c b

[PATCH v3 7/7] iommu/amd: Do not support IOMMUv2 APIs when SNP is enabled

2022-06-22 Thread Suravee Suthikulpanit via iommu
The IOMMUv2 APIs (for supporting shared virtual memory with PASID) configures the domain with IOMMU v2 page table, and sets DTE[Mode]=0. This configuration cannot be supported on SNP-enabled system. Signed-off-by: Suravee Suthikulpanit --- drivers/iommu/amd/init.c | 7 ++- 1 file changed, 6

[PATCH] iommu/amd: Fix I/O page table memory leak

2022-02-10 Thread Suravee Suthikulpanit via iommu
updating the mode. Cc: Joerg Roedel Reported-by: Daniel Jordan Tested-by: Daniel Jordan Signed-off-by: Suravee Suthikulpanit Fixes: e42ba0633064 ("iommu/amd: Restructure code for freeing page table") Link: https://lore.kernel.org/all/20220118194720.urjgi73b7c3tq...@oracle.com/ --- drivers

[PATCH] iommu/amd: Do not call sleep while holding spinlock

2022-03-13 Thread Suravee Suthikulpanit via iommu
: dc6a709e5123 ("iommu/amd: Improve amd_iommu_v2_exit()") Signed-off-by: Suravee Suthikulpanit --- drivers/iommu/amd/iommu_v2.c | 12 +++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/drivers/iommu/amd/iommu_v2.c b/drivers/iommu/amd/iommu_v2.c index 490da41c3c71..5a

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