), but
something like:
Hehe, I wasn't actually expecting a patch, but thanks!
-- 8 --
Subject: [PATCH v2] iommu/arm-smmu: don't touch the secure STLBIALL register
Currently we do a STLBIALL when we initialize the SMMU. However, on
systems with sane secure
configurations (i.e
On Tue, Jan 06, 2015 at 11:30:49PM +, Mitchel Humpherys wrote:
On Tue, Jan 06 2015 at 02:35:28 PM, Rob Herring robherri...@gmail.com wrote:
On Tue, Jan 6, 2015 at 2:16 PM, Mitchel Humpherys
mitch...@codeaurora.org wrote:
On Tue, Jan 06 2015 at 06:15:07 AM, Will Deacon
the only way to nuke
the whole TLB would be to use ARM_SMMU_GR0_STLBIALL.
Still not sure I understand what the correct address is for STLBIALL
on Calxeda (i.e. whether or not we need to use ARM_SMMU_GR0_NS), but
something like:
-- 8 --
Subject: [PATCH v2] iommu/arm-smmu: don't touch the secure
On Wed, Jan 07 2015 at 02:13:00 AM, Will Deacon will.dea...@arm.com wrote:
On Tue, Jan 06, 2015 at 11:30:49PM +, Mitchel Humpherys wrote:
On Tue, Jan 06 2015 at 02:35:28 PM, Rob Herring robherri...@gmail.com
wrote:
On Tue, Jan 6, 2015 at 2:16 PM, Mitchel Humpherys
Hi Mitch,
On Tue, Dec 23, 2014 at 05:39:22PM +, Mitchel Humpherys wrote:
Currently we do a STLBIALL when we initialize the SMMU. However, in
some configurations that register is not supposed to be touched and is
marked as Secure only in the spec. Rip it out.
Signed-off-by: Mitchel
On Tue, Jan 06 2015 at 06:15:07 AM, Will Deacon will.dea...@arm.com wrote:
/* Invalidate the TLB, just in case */
-writel_relaxed(0, gr0_base + ARM_SMMU_GR0_STLBIALL);
writel_relaxed(0, gr0_base + ARM_SMMU_GR0_TLBIALLH);
writel_relaxed(0, gr0_base +
On Tue, Jan 06 2015 at 02:35:28 PM, Rob Herring robherri...@gmail.com wrote:
On Tue, Jan 6, 2015 at 2:16 PM, Mitchel Humpherys
mitch...@codeaurora.org wrote:
On Tue, Jan 06 2015 at 06:15:07 AM, Will Deacon will.dea...@arm.com wrote:
/* Invalidate the TLB, just in case */
-
On Tue, Jan 6, 2015 at 2:16 PM, Mitchel Humpherys
mitch...@codeaurora.org wrote:
On Tue, Jan 06 2015 at 06:15:07 AM, Will Deacon will.dea...@arm.com wrote:
/* Invalidate the TLB, just in case */
-writel_relaxed(0, gr0_base + ARM_SMMU_GR0_STLBIALL);
writel_relaxed(0, gr0_base +
Currently we do a STLBIALL when we initialize the SMMU. However, in
some configurations that register is not supposed to be touched and is
marked as Secure only in the spec. Rip it out.
Signed-off-by: Mitchel Humpherys mitch...@codeaurora.org
---
drivers/iommu/arm-smmu.c | 2 --
1 file
