[PATCH] iommu/arm-smmu-v2: ThunderX(errata-23399) mis-extends 64bit registers

2015-08-03 Thread tchalamarla
From: Tirumalesh Chalamarla The SMMU architecture defines two different behaviors when 64-bit registers are written with 32-bit writes. The first behavior causes zero extension into the upper 32-bits. The second behavior splits a 64-bit register into "normal" 32-bit register pairs. On some pas

Re: [PATCH] iommu/arm-smmu-v2: ThunderX(errata-23399) mis-extends 64bit registers

2015-07-31 Thread Russell King - ARM Linux
On Thu, Jul 30, 2015 at 08:54:04PM +, Chalamarla, Tirumalesh wrote: > is some thing like this looks good > > +#ifdef CONFIG_64BIT > +#define smmu_writeq(reg64, addr) writeq_relaxed((reg64), (addr)) > +#else > +#define smmu_writeq(reg64, addr) \ > + wri

Re: [PATCH] iommu/arm-smmu-v2: ThunderX(errata-23399) mis-extends 64bit registers

2015-07-31 Thread Will Deacon
On Thu, Jul 30, 2015 at 09:54:04PM +0100, Chalamarla, Tirumalesh wrote: > is some thing like this looks good That's the right sort of idea, but please send a proper patch that you've actually tested. The diff below mixes up reg64 and reg. Will > +#ifdef CONFIG_64BIT > +#define smmu_writeq(reg64,

Re: [PATCH] iommu/arm-smmu-v2: ThunderX(errata-23399) mis-extends 64bit registers

2015-07-30 Thread Chalamarla, Tirumalesh
is some thing like this looks good +#ifdef CONFIG_64BIT +#define smmu_writeq(reg64, addr) writeq_relaxed((reg64), (addr)) +#else +#define smmu_writeq(reg64, addr) \ + writel_relaxed(((reg64) >> 32), ((addr) + 4)); \ + writel_relaxed((reg64),

Re: [PATCH] iommu/arm-smmu-v2: ThunderX(errata-23399) mis-extends 64bit registers

2015-07-30 Thread Robin Murphy
On 30/07/15 19:45, Will Deacon wrote: Hello, On Thu, Jul 30, 2015 at 06:55:06PM +0100, tchalama...@caviumnetworks.com wrote: From: Tirumalesh Chalamarla The SMMU architecture defines two different behaviors when 64-bit registers are written with 32-bit writes. The first behavior causes zero

Re: [PATCH] iommu/arm-smmu-v2: ThunderX(errata-23399) mis-extends 64bit registers

2015-07-30 Thread Chalamarla, Tirumalesh
On Jul 30, 2015, at 11:45 AM, Will Deacon mailto:will.dea...@arm.com>> wrote: Hello, On Thu, Jul 30, 2015 at 06:55:06PM +0100, tchalama...@caviumnetworks.com wrote: From: Tirumalesh Chalamarla mailto:tchalama...@caviumnetworks.com>> The SMMU architectur

Re: [PATCH] iommu/arm-smmu-v2: ThunderX(errata-23399) mis-extends 64bit registers

2015-07-30 Thread Will Deacon
Hello, On Thu, Jul 30, 2015 at 06:55:06PM +0100, tchalama...@caviumnetworks.com wrote: > From: Tirumalesh Chalamarla > > The SMMU architecture defines two different behaviors when 64-bit > registers are written with 32-bit writes. The first behavior causes > zero extension into the upper 32-bit