Hi Will,
On 05/10/2017 18:54, Robin Murphy wrote:
> On 05/10/17 17:49, Will Deacon wrote:
>> The SMMUv3 architecture permits caching of data structures deemed to be
>> "reachable" by the SMU, which includes STEs marked as invalid. When
>> transitioning an STE to a bypass/fault configuration at ini
On 05/10/17 17:49, Will Deacon wrote:
> The SMMUv3 architecture permits caching of data structures deemed to be
> "reachable" by the SMU, which includes STEs marked as invalid. When
> transitioning an STE to a bypass/fault configuration at init or detach
> time, we mistakenly elide the CMDQ_OP_CFGI
The SMMUv3 architecture permits caching of data structures deemed to be
"reachable" by the SMU, which includes STEs marked as invalid. When
transitioning an STE to a bypass/fault configuration at init or detach
time, we mistakenly elide the CMDQ_OP_CFGI_STE operation in some cases,
therefore potent