Re: [PATCH 1/1] x86/iommu: correct ICS register offset

2013-09-25 Thread Li, Zhen-Hua
Joerg, Thank you for reviewing this patch. ZhenHua On 09/24/2013 07:05 PM, Joerg Roedel wrote: On Tue, Sep 17, 2013 at 04:38:29PM +0800, ZhenHua wrote: Hi Guys, Though DMAR_ICS_REG is not used yet, I think this patch is necessary. So please take a look at it. You are right, my Spec

Re: [PATCH 1/1] x86/iommu: correct ICS register offset

2013-09-24 Thread Joerg Roedel
On Tue, Sep 17, 2013 at 04:38:29PM +0800, ZhenHua wrote: > Hi Guys, > Though DMAR_ICS_REG is not used yet, I think this patch is > necessary. So please take a look at it. You are right, my Spec says the same. It doesn't matter much since the register seems to be unused in the VT-d driver. I a

Re: [PATCH 1/1] x86/iommu: correct ICS register offset

2013-09-17 Thread ZhenHua
Hi Guys, Though DMAR_ICS_REG is not used yet, I think this patch is necessary. So please take a look at it. Thanks ZhenHua On 09/13/2013 02:27 PM, Li, Zhen-Hua wrote: According to Intel Vt-D specs, the offset of Invalidation complete status register should be 0x9C, not 0x98. See Intel's

[PATCH 1/1] x86/iommu: correct ICS register offset

2013-09-12 Thread Li, Zhen-Hua
According to Intel Vt-D specs, the offset of Invalidation complete status register should be 0x9C, not 0x98. See Intel's VT-d spec, Revision 1.3, Chapter 10.4, Page 98; Signed-off-by: Li, Zhen-Hua --- include/linux/intel-iommu.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git