On 08/03/18 16:24, Jonathan Cameron wrote:
> On Mon, 12 Feb 2018 18:33:50 +
> Jean-Philippe Brucker wrote:
>
>> For PCI devices that support it, enable the PRI capability and handle
>> PRI Page Requests with the generic fault handler.
>>
>> Signed-off-by: Jean-Philippe Brucker
> A couple of
On Mon, 12 Feb 2018 18:33:50 +
Jean-Philippe Brucker wrote:
> For PCI devices that support it, enable the PRI capability and handle
> PRI Page Requests with the generic fault handler.
>
> Signed-off-by: Jean-Philippe Brucker
A couple of nitpicks.
> ---
> drivers/iommu/arm-smmu-v3.c | 174
On 05/03/18 12:29, Dongdong Liu wrote:
>>
>> +static int arm_smmu_enable_pri(struct arm_smmu_master_data *master)
>> +{
>> +int ret, pos;
>> +struct pci_dev *pdev;
>> +/*
>> + * TODO: find a good inflight PPR number. We should divide the PRI queue
>> + * by the number of PRI-cap
+static int arm_smmu_enable_pri(struct arm_smmu_master_data *master)
+{
+ int ret, pos;
+ struct pci_dev *pdev;
+ /*
+* TODO: find a good inflight PPR number. We should divide the PRI queue
+* by the number of PRI-capable devices, but it's impossible to know
+
For PCI devices that support it, enable the PRI capability and handle
PRI Page Requests with the generic fault handler.
Signed-off-by: Jean-Philippe Brucker
---
drivers/iommu/arm-smmu-v3.c | 174 ++--
1 file changed, 119 insertions(+), 55 deletions(-)
dif
