Re: [PATCH v8 1/5] Doc: iommu/arm-smmu-v3: Add workaround for HiSilicon erratum 161010801

2017-10-05 Thread Rob Herring
On Wed, Sep 27, 2017 at 02:32:37PM +0100, Shameer Kolothum wrote: > From: John Garry > > The HiSilicon erratum 161010801 describes the limitation of HiSilicon > platforms hip06/hip07 to support the SMMU mappings for MSI transactions. > > On these platforms, GICv3 ITS

[PATCH v8 1/5] Doc: iommu/arm-smmu-v3: Add workaround for HiSilicon erratum 161010801

2017-09-27 Thread Shameer Kolothum
From: John Garry The HiSilicon erratum 161010801 describes the limitation of HiSilicon platforms hip06/hip07 to support the SMMU mappings for MSI transactions. On these platforms, GICv3 ITS translator is presented with the deviceID by extending the MSI payload data to 64