avium.com; l...@kernel.org;
>>>> jacob.jun@linux.intel.com; alex.william...@redhat.com;
>>>> robh...@kernel.org; Leizhen (ThunderTown) <thunder.leiz...@huawei.com>;
>>>> bhelg...@google.com; dw...@infradead.org; liubo (CU)
>>>> <liub
ho...@arm.com>; Robin
> Murphy <robin.mur...@arm.com>; nwatt...@codeaurora.org; Linuxarm
> <linux...@huawei.com>
> Subject: Re: [RFCv2 PATCH 14/36] iommu/arm-smmu-v3: Add support for
> Substream IDs
>
> On 03/11/17 05:45, Yisheng Xie wrote:
> > Hi Jean,
> >
>
kernel.org; Leizhen (ThunderTown) <thunder.leiz...@huawei.com>;
>>> bhelg...@google.com; dw...@infradead.org; liubo (CU)
>>> <liub...@huawei.com>; r...@rjwysocki.net; robdcl...@gmail.com;
>>> hanjun....@linaro.org; Sudeep Holla <sudeep.ho...@arm.com>; Robin
>
(CU)
>> <liub...@huawei.com>; r...@rjwysocki.net; robdcl...@gmail.com;
>> hanjun....@linaro.org; Sudeep Holla <sudeep.ho...@arm.com>; Robin
>> Murphy <robin.mur...@arm.com>; nwatt...@codeaurora.org; Linuxarm
>> <linux...@huawei.com>
>
ho...@arm.com>; Robin
> Murphy <robin.mur...@arm.com>; nwatt...@codeaurora.org; Linuxarm
> <linux...@huawei.com>
> Subject: Re: [RFCv2 PATCH 14/36] iommu/arm-smmu-v3: Add support for
> Substream IDs
>
> Hi Shameer,
>
> On Thu, Nov 02, 2017 at 12:49:32PM +, Sham
Hi Shameer,
On Thu, Nov 02, 2017 at 12:49:32PM +, Shameerali Kolothum Thodi wrote:
> We had a go with this series on HiSIlicon D05 platform which doesn't have
> support for ssids/ATS/PRI, to make sure it generally works.
>
> But observed the below crash on boot,
>
> [ 16.009084] WARNING:
t; bhelg...@google.com; dw...@infradead.org; liubo (CU)
> <liub...@huawei.com>; r...@rjwysocki.net; robdcl...@gmail.com;
> hanjun@linaro.org; sudeep.ho...@arm.com; robin.mur...@arm.com;
> nwatt...@codeaurora.org
> Subject: [RFCv2 PATCH 14/36] iommu/arm-smmu-v3: Add support for
>
At the moment, the SMMUv3 driver offers only one stage-1 or stage-2
address space to each device. SMMUv3 allows to associate multiple address
spaces per device. In addition to the Stream ID (SID), that identifies a
device, we can now have Substream IDs (SSID) identifying an address space.
In PCIe
