*Greetings!* * *Our *'Folsom, CA'* based client is looking for *'RTL Design & Verification' * to fill its *Contract* opportunity.* *
** * * *Title: *RTL Design* *& Verification Engineer* * *Location:* Folsom, CA* Duration: *9+ Months * * *Job Description:-* * * · Engineers /Leads with at least 3 years of experience in IP and SoC RTL verification · Must have hands-on experience in definition of test plan, development of test bench & test cases and debug and execution using System Verilog UVM/OVM/VMM approaches · Specman Experience is a plus · Candidate should have experience in functional and code coverage aspects · Experience in ARM/x86/DSP based SoCs with experience in interface IPs ( PCIe, USB, SATA, MIPI etc ) or Memory Interfaces ( Flash, DDR, SDIO etc ) or SoC infrastructure blocks ( Bus Infrastructure, DMA etc ). * * *Warm Regards,* ** *Viduthalai Selvan (Vidu)* *First Tek, Inc.* *Direct:* 732-328-2287 *viduth.sel...@first-tek.com* | *www.first-tek.com* *Ranked 31st on Deloitte 2008 NY, NJ, CT Technology Fast 50* *A 2007 Inc 500 winner for 2004-2006* *A 2007 NJ Finest winner for 2004-2006* *Ranked 4th on Deloitte 2007 Technology Fast 50 for 2002-2006*** -- You received this message because you are subscribed to the Google Groups "it req" group. To unsubscribe from this group and stop receiving emails from it, send an email to it-req+unsubscr...@googlegroups.com. To post to this group, send email to it-req@googlegroups.com. Visit this group at http://groups.google.com/group/it-req. For more options, visit https://groups.google.com/groups/opt_out.
