On 07/09/2023 02:54, bot crack wrote:
Hi,
1. #define arm_read_sysreg_64(op1, crm, val) \
asm volatile ("mrrc p15, "#op1", %Q0, %R0, "#crm"\n" \
: "=r" ((u64)(val))) The assembly of this macro should be *"mrrc p15,
"#op1", %Q0, %R0,"*
*
*2. But aarch64 does not use the cp15 register, I disassembled
inmates/lib/arm-common/timing.o(arm_read_sysreg(CNTPCT_EL0, pct64);) and
the instruction was displayed as *"MRS X0, #3, c14, c0, #1" ,*And the
instruction "*mrrc p15*" cannot be found in it.
Ah, inmates. Inmates use their own sysregs.h, and right, I looked at the
wrong include, i took the arm sysregs.h instead of the arm64 one.
See inmates/lib/arm64/include/asm/sysregs.h resp.
hypervisor/arch/arm64/include/asm/sysregs.h
And yes, on aarch64, cntpct_el0 is understood by the assembler:
https://github.com/bminor/binutils-gdb/blob/33a0b291058120c1294e90b53a5299c3ec62bad9/opcodes/aarch64-opc.c#L4944
Ralf
On Wednesday, September 6, 2023 at 10:14:30 PM UTC+8 Ralf Ramsauer wrote:
On 06/09/2023 03:40, bot crack wrote:
> Hi
>
> 1. I want to add some register definitions.
> 2. I want to know why #define CNTPCT_EL0 SYSREG_64(0, c14) in arm64
> *has only two arguments*, but it can be expanded into assembly "MRS
> X0, #3, c14, c0, #1"
oh yeah, that's finest macro magic!
#define CNTPCT_EL0 SYSREG_64(0, c14)
#define SYSREG_64(...) 64, __VA_ARGS__
leads to the equivalent:
#define CNTPCT_EL0 64, 0, c14
Usage of CNTPCT_EL0:
arm_read_sysreg(CNTPCT_EL0, pct64);
with
#define arm_read_sysreg(...) _arm_read_sysreg(__VA_ARGS__)
So here, we, in fact, have
_arm_read_sysreg(64, 0, c14, pct64)
Which is defined as:
#define _arm_read_sysreg(size, ...) arm_read_sysreg_ ##
size(__VA_ARGS__)
So we get
arm_read_sysreg_64(0, c14, pct64)
which is defined as:
#define arm_read_sysreg_64(op1, crm, val) \
asm volatile ("mrrc p15, "#op1", %Q0, %R0, "#crm"\n" \
: "=r" ((u64)(val)))
The rest is done by the assembler.
> 3. I didn’t understand the definition in
> inmates/lib/arm64/include/asm/sysregs.h because I couldn’t find how
> to expand the macro definition SYSREG_64
#define SYSREG_64(...) 64, __VA_ARGS__
SYSREG_64(1,2,foo) => 64, 1, 2, foo
These can be used as arguments in further macros.
> 4. For example, I want to add a new CNTVCT_EL0 (op0=0b11, op1=0b011,
> CRn=0b1110, CRm=0b0, op2=b010) register. How should I do it?
I don't know, but have a look at the Linux kernel to see how others did
it in a pretty similar way:
https://elixir.bootlin.com/linux/latest/source/arch/arm/include/asm/vdso/cp15.h#L32
<https://elixir.bootlin.com/linux/latest/source/arch/arm/include/asm/vdso/cp15.h#L32>
HTH,
Ralf
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