Signed-off-by: Ralf Ramsauer <ralf.ramsa...@oth-regensburg.de>
---
 configs/riscv/qemu-inmate-demo.c |  1 +
 configs/riscv/qemu-inmate-demo.h | 65 ++++++++++++++++++++++++++++++++
 configs/riscv/qemu-layout.h      |  6 +++
 3 files changed, 72 insertions(+)
 create mode 100644 configs/riscv/qemu-inmate-demo.c
 create mode 100644 configs/riscv/qemu-inmate-demo.h

diff --git a/configs/riscv/qemu-inmate-demo.c b/configs/riscv/qemu-inmate-demo.c
new file mode 100644
index 00000000..f0a3db6c
--- /dev/null
+++ b/configs/riscv/qemu-inmate-demo.c
@@ -0,0 +1 @@
+#include "qemu-inmate-demo.h"
diff --git a/configs/riscv/qemu-inmate-demo.h b/configs/riscv/qemu-inmate-demo.h
new file mode 100644
index 00000000..9d3e7abe
--- /dev/null
+++ b/configs/riscv/qemu-inmate-demo.h
@@ -0,0 +1,65 @@
+/*
+ * Jailhouse, a Linux-based partitioning hypervisor
+ *
+ * Minimal configuration for RISC-V demo inmate, 1 CPU, 1MiB RAM
+ *
+ * Copyright (c) OTH Regensburg 2022
+ *
+ * Authors:
+ *  Ralf Ramsauer <ralf.ramsa...@oth-regensburg.de>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2.  See
+ * the COPYING file in the top-level directory.
+ */
+
+#include <jailhouse/types.h>
+#include <jailhouse/cell-config.h>
+#include "qemu-layout.h"
+
+struct {
+       struct jailhouse_cell_desc cell;
+       struct jailhouse_cpu cpus[1];
+       struct jailhouse_memory mem_regions[2];
+} __attribute__((packed)) config = {
+       .cell = {
+               .signature = JAILHOUSE_CELL_DESC_SIGNATURE,
+               .revision = JAILHOUSE_CONFIG_REVISION,
+               .architecture = JAILHOUSE_RISCV64,
+               .name = "qemu-inmate-demo",
+               .flags = JAILHOUSE_CELL_PASSIVE_COMMREG |
+                       JAILHOUSE_CELL_TEST_DEVICE |
+                       JAILHOUSE_CELL_VIRTUAL_CONSOLE_PERMITTED |
+                       JAILHOUSE_CELL_VIRTUAL_CONSOLE_ACTIVE,
+
+               .num_cpus = ARRAY_SIZE(config.cpus),
+               .num_memory_regions = ARRAY_SIZE(config.mem_regions),
+               .num_irqchips = 0,
+               .num_pci_devices = 0,
+
+               .console = {
+                       .type = JAILHOUSE_CON_TYPE_RISCV_SBI,
+               },
+       },
+
+       .cpus = {
+               {
+                       .phys_id = 2,
+               },
+       },
+
+       .mem_regions = {
+               /* RAM */ {
+                       .phys_start = INMATE_TINY_PHYS,
+                       .virt_start = 0x0,
+                       .size = INMATE_TINY_SIZE,
+                       .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+                               JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE,
+               },
+               /* communication region */ {
+                       .virt_start = 0x00100000,
+                       .size = 0x00001000,
+                       .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+                               JAILHOUSE_MEM_COMM_REGION,
+               },
+       },
+};
diff --git a/configs/riscv/qemu-layout.h b/configs/riscv/qemu-layout.h
index 5ec52198..8f4d4554 100644
--- a/configs/riscv/qemu-layout.h
+++ b/configs/riscv/qemu-layout.h
@@ -20,3 +20,9 @@
 #define HV_SIZE                        0x600000 /* 6MiB HV Size */
 #define HV_OFFSET              0x200000 /* Recent OpenSBI place DTB there */
 #define HV_PHYS                        (MEM_TOP - HV_OFFSET - HV_SIZE)
+
+/* In preparation for IVSHMEM */
+#define IVSHMEM_NET_PHYS       (HV_PHYS - MIB)
+
+#define INMATE_TINY_SIZE       MIB
+#define INMATE_TINY_PHYS       (IVSHMEM_NET_PHYS - INMATE_TINY_SIZE)
-- 
2.40.1

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