https://bugs.kde.org/show_bug.cgi?id=357059
Julian Seward changed:
What|Removed |Added
Status|UNCONFIRMED |RESOLVED
https://bugs.kde.org/show_bug.cgi?id=357059
--- Comment #4 from Janne Grunau ---
(In reply to Julian Seward from comment #2)
> I'm not sure your test program is correct. The tag word is 16 bits
> at byte offsets 8 and 9, but the program tests fenv[9] and [10].
>
> That
https://bugs.kde.org/show_bug.cgi?id=357059
--- Comment #3 from Julian Seward ---
If I had to guess, I would say that the Sept 2015 Intel docs are wrong,
and that this instruction (cvtpi2ps) should behave the same way as
cvtpi2pd does -- that is, a transition to MMX state
https://bugs.kde.org/show_bug.cgi?id=357059
--- Comment #2 from Julian Seward ---
I'm not sure your test program is correct. The tag word is 16 bits
at byte offsets 8 and 9, but the program tests fenv[9] and [10].
That said .. even after changing the 9 and 10 to 8 and 9, it
https://bugs.kde.org/show_bug.cgi?id=357059
--- Comment #1 from Janne Grunau ---
Created attachment 96265
--> https://bugs.kde.org/attachment.cgi?id=96265=edit
simplified test case from libav's checkasm
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