Question about "barrier()" in the SLUB's fast path

Hi, Recently, I had difficulty understanding the meaning of the barrier() in the slab_alloc_node(). The comments are written like this. /* * Irqless object alloc/free algorithm used here depends on sequence * of fetching cpu_slab's data. tid should be fetched before anything * on c to guarantee

Re: Why a “barrier()” is enough for disabling or enabling the preemption?

> #define preempt_disable() barrier() > .. > #define preempt_enable() barrier() Let me try answering this with a limited knowledge I have about barriers. barrier() essentially was added so that compiler reordering does not happen. In the code above, since the compiler does

Why a “barrier()” is enough for disabling or enabling the preemption?

Hi all, Below is the preemption disable/enable code: #ifdef CONFIG_PREEMPT_COUNT #define preempt_disable() \ do { \ inc_preempt_count(); \ barrier(); \ } while (0) .. #define preempt_enable() \ do { \ preempt_enable_no_resched(); \ barrier

RE: barrier()

digest... Today's Topics: 1. Re: atomic operations (valdis.kletni...@vt.edu) 2. valid address space ? (Abu Rasheda) 3. Re: valid address space ? (Abu Rasheda) 4. barrier() (Shraddha Kamat) 5. Re: test jiffies on ARM SMP board (bill4carson) 6. Re: test jiffies on ARM SMP

barrier()

#define barrier() asm volatile( ::: memory) What exactly volatile( ::: memory) doing here ? I was referring to gnu as (ver 2.14) manual but could not get much clue about this assembly construct - any pointers ? ___ Kernelnewbies mailing list

Re: barrier()

On Mon, 25 Feb 2013 12:26:06 +0530, Shraddha Kamat said: #define barrier() asm volatile( ::: memory) What exactly volatile( ::: memory) doing here ? You probably should read Documentation/memory-barriers.txt in your kernel source tree, and let us know if you still have questions after

Re: Memory barrier

Hi, In my opinion it is not correct to say make order on current CPU in case of SMP. Actually, we cope with shared resource here - memory, and observes for that resource - CPUs. As soon as CPU is asked to make a barrier (with some sort of instruction) access to shared resource is ordered among

Re: memory barrier in UP

Hi... On Mon, Dec 12, 2011 at 01:11, subin gangadharan subingangadha...@gmail.com wrote: Hi All, I am reading about the barrier from linux kernel development.In this books, he says On SMP kernels they are defined only as usual memory barriers.where as on UP kernels they are defined only

Re: memory barrier in UP

Hi Mulyadi, Thanks for the answer. On Mon, Dec 12, 2011 at 11:16 AM, Mulyadi Santosa mulyadi.sant...@gmail.com wrote: Hi... On Mon, Dec 12, 2011 at 01:11, subin gangadharan subingangadha...@gmail.com wrote: Hi All, I am reading about the barrier from linux kernel development.In

Re: memory barrier in UP

Hi Subin On Tue, Dec 13, 2011 at 01:57, subin gangadharan subingangadha...@gmail.com wrote: Hi Mulyadi, Thanks for the answer. You welcome...I just shared what I know :) In that case (ALPHA), is compiler barrier sufficient enough to prevent the re ordering done by the processor. What

memory barrier in UP

Hi All, I am reading about the barrier from linux kernel development.In this books, he says On SMP kernels they are defined only as usual memory barriers.where as on UP kernels they are defined only as a compiler barrier Does this mean in UP, processor won't reorder the instructions ? Could

Memory barrier

Hi All, I need small clarification on memory barrier. #define smp_mb()        mb() #define smp_rmb()       rmb() #define smp_wmb()       wmb() In case of SMP: is smp_mb() or smp_rmb() make order on current CPU or all cpu's Thanks ___ Kernelnewbies