the addresses that we give on the u-boot command line are physical
addresses and not virtual, right (Thus implying MMU is not turned
on?)?
Or is it that kernel always gets the control with MMU on on PPC systems?
How about other architectures?
Thanks,
Rick
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Hi,
AFAIK the PCI-PCI bridges are visible on two PCI buses (primary bus
and secondary bus). Hence there ought to be two PCI addresses for the
device - A.x.y and B.x.y, where A and B are primary and secondary bus
numbers. Is this right?
Thanks,
Rick
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latency contradictory?
I mean there will always be a tradeoff between the two. Any efforts to
decrease on / make it predictable will increase / make unpredictable
of the other. No?
Thanks,
Rick
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and most importantly, does my driver need to do anything
differently depending upon whether the IRQ line is edge triggered or
level triggered? And what does the kernel do differently for both the
cases?
TIA,
Rick.
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, or it MAY fail?
Thanks,
Rick
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Please read the FAQ at http://kernelnewbies.org/FAQ
can only be running a 32
bit OS. A 64 bit processor may run a 32 or a 64 bit OS. A 32 bit
compiler genrates code only to be run on a 32 bit OS; ditto for 64
bit. Is this right?
TIA,
Rick
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Please
2G, do I also need to make changes in the glibc or
the gcc?
TIA,
Rick
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In article cb4b81db-98f6-42a6-8c0c-2e03bfd4d...@gmail.com,
Vinny Badrinathan vinny...@gmail.com wrote:
Is there a particular reason why this isn't a blind list? I'm
probably using the wrong term here so I'll describe it: the reader can
see the senders screename but when the reader wants to
In article [EMAIL PROTECTED],
Enes Albay [EMAIL PROTECTED] wrote:
i'm reading linux device driver book, and i'm looking for real
world examples of device drivers. Do you have any suggestion
which driver is convenient for preliminary?
What kind of driver are you interested in?
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Hi,
If a particual IRQ line has been disabled (disable_irq()), what
happens if the device on that IRQ line generates interrupt? Does it
result in missed interrupt?
And in case of Uniprocessor machine, what happens if interrupts are
generated while spinlock_irq_save() etc?
TIA,
Rick
is executes first, an unnecessary copy of the pages is made (if
parents writes) and later on when child executes, a fresh address
space is executed.
So in linux, is a child run first or the parent? Can we rely on this
information?
TIA
Rick
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? E.g. who fills, flushes refills the TLB entries?
What all initializations need to be performed by kernel (And where is
the code?)
TIA,
Rick
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to do? Will I be needed to create IP cores? Will I be
needed to design the embedded system from the scratch? Will I be
needed to make modifications in the tool chain?
Tx,
Rick
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In article [EMAIL PROTECTED],
Jesper Juhl [EMAIL PROTECTED] wrote:
Set your MTU to 9000 on all equipment in the network path that needs
to use jumbo frames.
That locked things up quite nicely here. So be forewarned.
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