On Fri, Jan 25, 2008 at 11:48:25AM +0530, sahlot arvind wrote:
The vast majority of it probably is, some of it isn't and it'll depend on
the architecture...
So isn't there a thick line that this code is PIC and this is not?
What I understand is that on any arch code, which runs before
I compiled kernel for ARM processor.
I am trying to trace kernel control flow. I am looking at file
arch/arm/kernel/head.S . Code starting with
---
__INIT
.type stext, #function
ENTRY(stext)
mov r12, r0
mov r0, #PSR_F_BIT | PSR_I_BIT |
On 24-01-08 14:02, sahlot arvind wrote:
That makes sense. Thanks a lot. So position independent code is one
wherein all the branch instructions are PC relative. Right?
More the other way around -- if all branches are PC relative you'll get
position independent code (codewise that is; it's
Rene,
If you look at the comment preceding that bit, you'll see it say that the
code is mostly (?) position independent and although I don't know ARM
assembly nor have an ARM toolchain installed, I bet that if you look at the
actual generated code, you'll see it generating the branch target as a
The vast majority of it probably is, some of it isn't and it'll depend on
the architecture...
So isn't there a thick line that this code is PIC and this is not?
What I understand is that on any arch code, which runs before enabling
paging unit must be PIC. Is that correct?
And one more question -
